Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 123
UG1182 (v1.2) March 20, 2017
Appendix B: Master Constraints File Listing
set_property PACKAGE_PIN AC8 [get_ports "FMC_HPC0_LA13_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA13_N"]
set_property PACKAGE_PIN AB8 [get_ports "FMC_HPC0_LA13_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA13_P"]
set_property PACKAGE_PIN AC6 [get_ports "FMC_HPC0_LA14_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA14_N"]
set_property PACKAGE_PIN AC7 [get_ports "FMC_HPC0_LA14_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA14_P"]
set_property PACKAGE_PIN Y9 [get_ports "FMC_HPC0_LA15_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA15_N"]
set_property PACKAGE_PIN Y10 [get_ports "FMC_HPC0_LA15_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA15_P"]
set_property PACKAGE_PIN AA12 [get_ports "FMC_HPC0_LA16_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA16_N"]
set_property PACKAGE_PIN Y12 [get_ports "FMC_HPC0_LA16_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA16_P"]
set_property PACKAGE_PIN N11 [get_ports "FMC_HPC0_LA17_CC_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA17_CC_N"]
set_property PACKAGE_PIN P11 [get_ports "FMC_HPC0_LA17_CC_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA17_CC_P"]
set_property PACKAGE_PIN N8 [get_ports "FMC_HPC0_LA18_CC_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA18_CC_N"]
set_property PACKAGE_PIN N9 [get_ports "FMC_HPC0_LA18_CC_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA18_CC_P"]
set_property PACKAGE_PIN K13 [get_ports "FMC_HPC0_LA19_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA19_N"]
set_property PACKAGE_PIN L13 [get_ports "FMC_HPC0_LA19_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA19_P"]
set_property PACKAGE_PIN M13 [get_ports "FMC_HPC0_LA20_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA20_N"]
set_property PACKAGE_PIN N13 [get_ports "FMC_HPC0_LA20_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA20_P"]
set_property PACKAGE_PIN N12 [get_ports "FMC_HPC0_LA21_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA21_N"]
set_property PACKAGE_PIN P12 [get_ports "FMC_HPC0_LA21_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA21_P"]
set_property PACKAGE_PIN M14 [get_ports "FMC_HPC0_LA22_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA22_N"]
set_property PACKAGE_PIN M15 [get_ports "FMC_HPC0_LA22_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA22_P"]
set_property PACKAGE_PIN K16 [get_ports "FMC_HPC0_LA23_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA23_N"]
set_property PACKAGE_PIN L16 [get_ports "FMC_HPC0_LA23_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA23_P"]
set_property PACKAGE_PIN K12 [get_ports "FMC_HPC0_LA24_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA24_N"]
set_property PACKAGE_PIN L12 [get_ports "FMC_HPC0_LA24_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA24_P"]
set_property PACKAGE_PIN L11 [get_ports "FMC_HPC0_LA25_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA25_N"]
set_property PACKAGE_PIN M11 [get_ports "FMC_HPC0_LA25_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA25_P"]
set_property PACKAGE_PIN K15 [get_ports "FMC_HPC0_LA26_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA26_N"]
set_property PACKAGE_PIN L15 [get_ports "FMC_HPC0_LA26_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA26_P"]
set_property PACKAGE_PIN L10 [get_ports "FMC_HPC0_LA27_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA27_N"]
set_property PACKAGE_PIN M10 [get_ports "FMC_HPC0_LA27_P"]
Send Feedback

Xilinx ZCU102 Specifications

General

Processor	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
SD Card	MicroSD card slot
Video Outputs	DisplayPort
FPGA	Xilinx Zynq UltraScale+ XCZU9EG-2FFVB1156E
Memory	4GB DDR4 Component Memory
Storage	MicroSD card slot
Ethernet	Gigabit Ethernet
USB	1 x USB 3.0, 1 x USB 2.0
PCIe	PCIe Gen2 x4
Display	DisplayPort
Power Supply	12V DC input
SATA	SATA 3.0
Clocking	Programmable clocks
Operating System Support	PetaLinux