Xilinx Zynq UltraScale+ ZCU208 User Manual

FMCP Connector J28
[Figure 2, callout 25]
The HSPC connector J28 implements a subset of the full FMCP connecvity:
• 68 single-ended or 34 dierenal user-dened pairs (34 LA pairs: LA[00:33])
• 8 transceiver dierenal pairs
• 2 transceiver dierenal clocks
• 2 dierenal clocks
• 239 ground and 16 power connecons
See the FPGA Mezzanine Card (FMC) VITA 57.4 specicaon on the VITA FMC Markeng
Alliance website for addional informaon on the FMCP HSPC connector.
The detailed RFSoC connecons for the feature described in this secon are documented in the
ZCU208 board XDC le, referenced in Appendix B: Xilinx Design Constraints.
Cooling Fan Connector
[Figure 2, near callout 33]
The ZCU208 uses the Inneon MAX6643 (U50) fan controller, which autonomously controls the
fan speed by controlling the pulse width modulaon (PWM) signal to the fan based on the die
temperature sensed via the FPGA's DXP and DXN pins. The fan rotates slowly (acouscally quiet)
when the RFSoC is cool and rotates faster as the FPGA heats up (acouscally noisy). The fan
speed (PWM) versus the RFSoC die temperature algorithm along with the over temperature set
point and fan failure alarm mechanisms are dened by the strapping resistors on the MAX6643
device. The over temperature and fan failures alarms can be monitored by any available
processor in the RFSoC by polling the I2C expander U15 on the I2C0 bus. See the MAX6643
data sheet on the Maxim Integrated Circuits website for more informaon on the device circuit
implementaon on this board.
The ZCU208 cooling fan circuit is shown in the following gure.
Note: At inial power on, it is normal for the fan controller to energize at full speed for a few seconds.
Chapter 3: Board Component Descriptions
UG1410 (v1.0) July 8, 2020 www.xilinx.com
ZCU208 Board User Guide 57
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Xilinx Zynq UltraScale+ ZCU208 Specifications

General

Brand	Xilinx
Model	Zynq UltraScale+ ZCU208
Category	Motherboard
Language	English