AMD VCU118 - Page 30

VCU118 Board User Guide 30
UG1224 (v1.5) March 15, 2023
Chapter3: Board Component Descriptions
AY28 DDR4_C2_DQ77 POD12_DCI C8 DQU5 U139
BA27 DDR4_C2_DQ78 POD12_DCI D3 DQU6 U139
BB27 DDR4_C2_DQ79 POD12_DCI D7 DQU7 U139
BE25 DDR4_C2_DQS8_T DIFF_POD12_DCI G3 DQSL_C U139
BF25 DDR4_C2_DQS8_C DIFF_POD12_DCI F3 DQSL_T U139
BA26 DDR4_C2_DQS9_T DIFF_POD12_DCI B7 DQSU_C U139
BB26 DDR4_C2_DQS9_C DIFF_POD12_DCI A7 DQSU_T U139
BE29 DDR4_C2_DM8 POD12_DCI E7 DML_B/DBIL_B U139
BA29 DDR4_C2_DM9 POD12_DCI E2 DMU_B/DBIU_B U139
AM27 DDR4_C2_A0 SSTL12_DCI P3 A0 U135-U139
AL27 DDR4_C2_A1 SSTL12_DCI P7 A1 U135-U139
AP26 DDR4_C2_A2 SSTL12_DCI R3 A2 U135-U139
AP25 DDR4_C2_A3 SSTL12_DCI N7 A3 U135-U139
AN28 DDR4_C2_A4 SSTL12_DCI N3 A4 U135-U139
AM28 DDR4_C2_A5 SSTL12_DCI P8 A5 U135-U139
AP28 DDR4_C2_A6 SSTL12_DCI P2 A6 U135-U139
AP27 DDR4_C2_A7 SSTL12_DCI R8 A7 U135-U139
AN26 DDR4_C2_A8 SSTL12_DCI R2 A8 U135-U139
AM26 DDR4_C2_A9 SSTL12_DCI R7 A9 U135-U139
AR28 DDR4_C2_A10 SSTL12_DCI M3 A10/AP U135-U139
AR27 DDR4_C2_A11 SSTL12_DCI T2 A11 U135-U139
AV25 DDR4_C2_A12 SSTL12_DCI M7 A12/BC_B U135-U139
AT25 DDR4_C2_A13 SSTL12_DCI T8 A13 U135-U139
AR25 DDR4_C2_BA0 SSTL12_DCI N2 BA0 U135-U139
AU28 DDR4_C2_BA1 SSTL12_DCI N8 BA1 U135-U139
AU27 DDR4_C2_BG0 SSTL12_DCI M2 BG0 U135-U139
AV28 DDR4_C2_A14_WE_B SSTL12_DCI L2 WE_B/A14 U135-U139
AU26 DDR4_C2_A15_CAS_B SSTL12_DCI M8 CAS_B_A15 U135-U139
AV26 DDR4_C2_A16_RAS_B SSTL12_DCI L8 RAS_B/A16 U135-U139
AT26 DDR4_C2_CK_T DIFF_SSTL12_DCI K7 CK_T U135-U139
AT27 DDR4_C2_CK_C DIFF_SSTL12_DCI K8 CK_C U135-U139
AW28 DDR4_C2_CKE SSTL12_DCI K2 CKE U135-U139
AN25 DDR4_C2_ACT_B SSTL12_DCI L3 ACT_B U135-U139
BF29 DDR4_C2_PAR SSTL12_DCI P9 ALERT_B U135-U139
Table3‐3: DDR4 Memory 80‐bit I/F C2 to FPGA U1 Banks 40, 41, and 42 (Cont’d)
FPGA (U1)
Pin
Schematic Net Name I/O Standard
Component Memory
Pin # Pin Name Ref. Des.
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