MAX1000 User Guide www.arrow.com
Page | 52 July 2017
5.2.8.7 Add inputs to the schematic
Click on the “Pin Tool” as show below and select “Input”.
5.2.8.8 Add one input pin for inclk0 of the PLL.
Add one input pin for sel of counter_mux.
Your schematic should look like this:
5.2.8.9 Rename the pin_name1 to CLK12M by double clicking its current name. This is going to
be the clock signal coming into the FPGA.
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