Ashida ADR141C - Relay and LED Configuration; BIT Configuration for Relays and LEDs

NUMERICAL OC/EF PROTECTION RELAY ADR141C/241C
ASHIDA Electronics Pvt. Ltd.
Ref: Manual / ADR141C / 241C
Issue: 04D
Date : 10.07.2014
Page 41/86
8.3.7 Relay/ LED config. SETTINGS
8.3.7.1 BIT Configuration
For Relays RL1, RL2, RL3 and RL4.
For LED L1R /L1G, L2R/L2G, L3R/L3G and L4R/L4G
Bit Posit. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
A Err Proth
TC_
OK
TC_
Fail
CB
NC
CB
NO BF
Test_
Trip
3Io>>
Trip
B>>
Trip
Y>>
Trip
R>>
Trip
3Io>
Trip
B>
Trip
Y>
Trip
R>
Trip
B
x x x x x x SR/
HR
Test_
Pkp
3Io>>
Pkp
B>>
Pkp
Y>>
Pkp
R>>
Pkp
3Io>
Pkp
B>
Pkp
Y>
Pkp
R>
Pkp
Protection Function Bit information to assign
Set Bit Assign required protection function and digital input Binary ‘1’ to Set Bit
Reset Bit Assign required protection function and digital input Binary ‘0’ to Reset Bit
Self Reset ( SR ) Assign Bit no. 9 in Relay/LED B as Binary input ‘0’ to set selected function Self Reset.
Hand Reset ( HR ) Assign Bit no. 9 in Relay/LED B as Binary input ‘1’ to set selected function Hand
Reset.
x Not Applicable
List of Protection function & Digital input :-
Text Description
R> Trip R Phase IDMT/DMT Over Current Trip.
Y> Trip Y Phase IDMT/DMT Over Current Trip.
B> Trip B Phase IDMT/DMT Over Current Trip.
3Io> Trip Internal Derived EF ( 3Io ) IDMT/DMT Trip.
R>> Trip R Phase Inst. Over Current Trip.
Y>> Trip Y Phase Inst. Over Current Trip.
B>> Trip B Phase Inst. Over Current Trip.
3Io>> Trip Internal Derived EF (3Io) Inst. Trip.
R> Pkp R Phase IDMT/DMT Over Current Pkp.
Y> Pkp Y Phase IDMT/DMT Over Current Pkp.
B> Pkp B Phase IDMT/DMT Over Current Pkp.
3Io> Pkp Internal Derived EF ( 3Io ) IDMT/DMT Over Current Pkp.
R>> Pkp R Phase Inst. Over Current Pkp.
Y>> Pkp Y Phase Inst. Over Current Pkp.