ConMed ExcaliburPLUS PC - Page 39

used because it is not susceptible to this failure in
fault detection.
3.3.3 Controller, I/O
The four digital ports of the 8031 (U3) are func-
tionally
assigned as follows.
PORT 0 (P0.0 - P0.7). This port serves two digi-
tal functions: 8-bit data bus for communicating
with external I/O, and low-order address bus for
accessing external Program Memory.
PORT 1 (P1.0 - P1.7). This port is dedicated to
discrete inputs or outputs. Port 1.2 generates the
signal /RFEN used to control RF output. Port
1.3 is /LOUD which bypasses the audio volume
control during alarm conditions. Port 1.4 reads
the signal ARMCOMP which is supplied from
the comparator U23-13. ARMCOMP is used
during a software controlled successive approxi-
mation routine to determine contact resistance of
the Return Electrode. See Section 3.8. Port 1.6 is
used to control the upper and lower 512 byte
Memory Bank of U2. Port 1.7 is the Interrupt
Request (IRQ) from the keyboard/display con-
troller (A2U2) which resides on the Display
PWB. It is generated whenever a keyboard button
is depressed. IRQ does not actually interrupt the
microprocessor, but is simply read in as another
1/0 line.
PORT 2 (P2.0 - P2.7). This port supplies the
high-order address bus which reads from external
Program Memory and writes to external I/O. All
I/O is memory mapped so that distinct addresses
access specific devices. The system is configured
so that only one device is addressed at a time.
PORT 3 (P3.0 - P3.7). This port generates spe-
cial signals used to control the overall system.,
These are /RD, /WR for reading or writing to
external I/O, /PSEN (Program Store Enable)
which enables the external Program Memory to
the bus during instruction fetches, and ALE
(Address Latch Enable) used for latching the low-
order byte of address during access to external
Program Memory. Port 3.1 generates the signal,
/TONE, which is the source of the various audio
tones used to signal activation or alarm condi-
tions. Port 3.2 is the input for external interrupt,
/WDTINT, from the Watchdog Timer. Port 3.3
is the input for the external interrupt, /IFAIL,
xcalibur
generated by the current monitor. Ports 3.4 and
3.5 control the 128 byte Pages of the memory at
U2.
The Address Decoder (U9), is used to select
external I/O devices for reading and writing.
High-order address to the decoder inputs, (A10,
All, and A12) cause the corresponding output
(YO - Y7) to go low. After the address decode has
stabilized, either /RD or /WR will go low to exe-
cute a data transfer with the addressed device.
Peripheral Interface Adapter (PIA), U11, is a
general purpose I/O device designed to expand
the number of addressable I/O lines available. It
has three additional 8-bit ports (PA - PC) or 24
individually programmable pins. Port A is con-
figured to read switch closures from hand and
foot controls; Port B supplies an address to the
Waveform Generator used to select specific out-
put waveforms depending on the mode and
power selections. Port C is used to activate the
required relays to direct RF output to the appro-
priate accessory, and to control the Waveform
Generator latch.
3.3.4 Memory
The program used by the microprocessor is stored
in external memory, the bytewide EPROM (U1).
It is programmed and verified at the factory to
ensure correct operation of the ESU. The follow-
ing is the Memory Map for the 32Kx8 EPROM.
Address Code Block
0000-OFFFH CALONIY 4Keven
1000-1FFFH CAL and RUN 4K odd
2000-2FFFH CALONLY 4Keven
3000-3FFFH CALand RUN 4K odd
4000-4FFFH CAL ONLY 4Keven
5000-5FFFH CALand RUN 4K odd
6000-6FFFH CALONLY 4Keven
7000-7FFFH CAL and RUN 4K odd
When the switch at A3SI is in the CAL position,
Address Line A12 is low, and enables access to
the entire EPROM through the OR gate (U8-3).
Mutually exclusive calibration code is located in
the even 4K blocks. When the switch at A3S1 is
in the RUN position, Address Line A12 is high,
and disables access to half the EPROM through
the OR gate (U8-3). Run mode code (or shared