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Contec SBC Series User Manual

Contec SBC Series
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7. BIOS Setup
PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV
67
8Bit I/O Recovery Time
The recovery time is the time measured in CPU clock cycles that the system waits after
completing an I/O request. This delay is required because the CPU is operating at a
much faster speed than the I/O bus and therefore needs to be delayed to allow the I/O
to complete.
This setting determines the recovery time allowed for 8-bit I/O.
Selection options: N/A, 1 - 8 CPU clocks
16Bit I/O Recovery Time
This setting determines the recovery time allowed for 16-bit I/O.
Selection options: N/A, 1 - 4 CPU clocks
Memory Hole At 15M-16M
To improve performance, a fixed area can be reserved for use by ISA boards. This
memory must be mapped into the memory space below 16MB.
Selection options: Enabled: Memory hole supported, Disabled: Memory hole not
supported
Passive Release
If disabled, CPU - PCI bus access is permitted during the passive release time. If
enabled, the arbiter only handles separate PCI master access to local DRAM.
Selection options: Enabled, Disabled
Delay Transaction
The chipset incorporates a 32-bit post-write buffer to support delay transaction cycles.
Enable this option to comply with Ver.2.1 of the PCI specification.
Selection options: Enabled, Disabled
AGP Aperture Size (MB)
This selects the size of the accelerated graphics port (AGP) aperture. The AGP
aperture is a region of the PCI memory address range reserved for use as the graphics
memory address space.
Host cycles that hit the aperture range are transferred to the AGP without conversion.
Selection options: 4, 8, 16, 32, 64, 128, 256
Power-Supply Type
Selects the type of power supply.
Selection options: AT , ATX

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Contec SBC Series Specifications

General IconGeneral
BrandContec
ModelSBC Series
CategoryMotherboard
LanguageEnglish

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