Cray CRAY-1 - Page 143

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If

(VL)

were

2, however, element 1

would

have

been

joined with

64

bits

of

zero

and

only

two

operations

would

be

performed. Thus, the

last

element

ofVj

as

determined

by

(VL)

is

joined with

64

bits

of zeros.

The

following

figure

illustrates

this

operation.

I (El

ement

(VL)

-1)

of

Vj

000

.........

0

(Ak)

.

End

off

64-bit

result

to

element

(VL)-l

of

Vj

If

(Ak)

>

128,

the

result

is

all

zeros.

If

(Ak)

> 64, the

result

register

contains

(Ak)

-

64

zeros.

Example:

Suppose

that

a

152

instruction

is

to

be

executed

and

the following

register

conditions

exist:

(VL)

= 4

(Al) = 3

(El

ement

0)

of

V 4 = a

00000

0000 0000

0000

0007

(El

ement

1)

of V 4 = a

60000

0000 0000 0000

0005

(El

ement

2)

of V 4 = 1

00000

0000 0000 0000

0006

(Element

3)

of

V4

= 1

60000

0000

0000 0000 0007

Instruction

152541

is

executed

and

following execution, the

first

four

elements of

Vs

contain the following values:

2240004

(El

ement

0)

of

V 5 = 0

oooor

0000 0000

0000 0073

(El

ement

1)

of

V 5 = a

OOOOC

0000

0000

0000

0054

(Element

2)

of

Vs

= 0

00000

0000 0000 0000

0067

(Element

3)

of

Vs

= a

00000

0000

0000

0000 0070

4-57

E

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