EXCHANGE
MECHANISM
Exchange
mechanism
refers
to the technique
employed
in the
CRAY-l
for
switching
instruction
execution
from
program
to program. This technique
involves the use
of
blocks or
program
parameters
known
as exchange packages
and
a
CPU
operation
referred
to as
an
exchange sequence. Three special
registers
are instrumental in the exchange
mechanism.
These
are the exchange
address
(XA)
register,
the
mode
(M)
register,
and
the flag
(F)
register.
XA
REGISTER
The
XA
(exchange address)
register
specifies
the
first
word
address of a
16-word
exchange package loaded
by
an
exchange operation.
The
register
contains the upper
eight
bits
of a
12-bit
field
that
specifies
the address.
The
lower
bits
of
the
field
are always zero;
an
exchange package
must
begin
on
a
16-word
boundary.
The
12-bit
limit
requires
that
the absolute address
be
in the lower
4096
words
of
memory.
When
an
execution
interval
terminates, the exchange sequence exchanges the
contents
of
the
registers
with the contents of the exchange package
at
(XA)*16
in
memory.
M
REGISTER
The
M
(mode)
register
is
a
five-bit
register
that
contains
part
of the
exchange package for a
currently
active
program.
The
five
bits
are
selectively
set
during
an
exchange sequence. Bits are assigned in
words
n+
1
and
n+2
of the exchange package,
fi
gure 3-8"
as
fo
11
ows:
n+l
Bit
39
2240004
Interrupt
monitor
mode
select.
This
bit
is
significant
only
when
it
is
set
and
the Monitor
Mode
Interrupt
option
is
present.
If
Bit
39
of
n+2
is
set
and
this
bit
is
clear,
monitor
mode
1
is
selected
and
only the
memory
parity
error
interrupt
flag
can
be
set
while in monitor
mode.
If
Bit
39
of
n+2
and
this
bit
are both
set,
monitor
mode
2
is
in
effect
and
the
PC
interrupt,
MCU
inter-
rupt,
I/O
interrupt,
and
normal
exit
flags cannot
be
set.
3-37
E
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