Cray CRAY-1 - Exchange Package

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I Monitor

m9_~~_J~_!_errupt

option not

present

Any

flag

other

than the

memory

error

flag,

can

be

set

in the F

register

only

if

the

currently

active

exchange package

is

not

in monitor

mode.

This

means

that

these

flags

will

set

only

if

the highest order

bit

of

the M

register

is

zero.

With

the exception

of

the

memory

error

flag,

if

the

program

is

in monitor

mode

and

the conditions for

setting

an

F

register

flag are otherwise

present,

the flag remains cleared

and

no

exchange

sequence

is

initiated.

Moni

t9_~!!l_Cld~

__

(r11~!:t~R~

__

2E~

i

on

present

If

the monitor

mode

interrupt

option

is

present

and

the

currently

active

exchange package

is

not in monitor

mode

(Bit

39

of

n+2

of

the

r1

register

is

zero),

any

of

the nine F

register

flags

can

be

set

provided

that

all

interrupts

are enabled.

If

the

program

is

in monitor

mode

1

(Bit

39

of

n+2

of

the M

register

is

set

and

Bit

39

of

n+l

of

the M

register

is

zero),

the

memory

error

flag

is

the only

one

of

the nine F

register

flags

that

can

be

set.

The

memory

error

flag

can

be

set

while in monitor

mode

1

if

either

of

the

two

memory

parity

error

mode

bits

(Bits

36

and

38

of

the M

register)

is

also

set.

When

in monitor

mode

1,

none

of

the F

register

flags

can

be

set

but

an

exchange sequence

can

be

initiated

by

a

000

or a

004

instruction

even

though the

associated

error

exit

flag

or

normal

exit

flag

is

not

set.

If

the

program

is

in monitor

mode

2

(Bits

39

of

both

n+l

and

n+2

of

the M

register

are both

set),

all

F

register

flags

other

than the

PC

interrupt,

MCU

interrupt,

I/O

interrupt,

and

normal

exit

flags

can

be

set

and

an

exchange sequence will

be

initiated.

EXCHANGE

PACKAGE

An

exchange package

is

a 16-word block

of

data in

memory

which

is

associated

with a

particular

computer program.

It

contains the basic parameters

necessary to provide

continuity

from

one

execution

interval

for

the program

to

the next. These parameters

consist

of

the following:

Program

address

register

(P) -

22

bits

Base

address

register

(BA)

-

18

bits

Limit address

register

(LA)

-

18

bits

2240004

3-40

E

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