Cray CRAY-1 - Memory Data Path with SECDED

;°
1
I
ERROR CORRECT
-
MEMORY
-
DATA MERGE
& DATA FANOUT
G
I
~
63
1
//
DATA BITS\
CHECK BITS
L
64
..
ERROR
DETECT
'71
-
Figure 5-2. Memory data path with SECDED
The SECDED error processing scheme is based on error detection and
correction codes devised by R. W. Hammingt. An 8-bit check byte is
appended to the 64-bit data word before the data is written in memory.
The eight check bits are each generated as even parity bits for a
specific group of data bits. Figure 5-3 shows the bits of the data
word used to determine the state of each check bit. An X in the
horizontal
row indicates that data bit contributes to the generation
CPU
of that check bit. Thus, check bit number 0 (bit 2
64
) is the bit making
group parity even for the group of bits 2
1
, 2
3
, 2
5
, 2
7
, 2
9
, 2
11
, 2
13
, 2
15
,
217,219,221,223,225,227,229, and 2
31
through 255.
The eight check bits are stored in memory at the same location as the
data
word. When read from memory, the same 72-bit matrix of figure 5-3
is used to generate a new set of parity bits, which are even parity bits
of the data word and the old check bits. The resulting eight parity bits
are called syndrome bits, shown as bits 64 through 71 in figure 5-3.
t
Hamming, R.W., "Error Detection and Correcting Codes". Bell System
Technical Journal, 29, No., 2,147-160 (April, 1950).
2240004
5-6
E