Cypress EX-USB FX3 - Page 103

FX3 Programmers Manual, Doc. # 001-64707 Rev. *C 103
FX3 Serial Peripheral Register Access
9.1.1.4 I2S_INTR_MASK Register
The I2S_INTR_MASK is used to enable the desired I2S related interrupt sources.
9.1.1.5 I2S_EGRESS_DATA_LEFT Register
The I2S_EGRESS_DATA_LEFT register is used to add data to the I2S transmit FIFO for the left
channel, when the I2S interface is working in Register mode (I2S_CONFIG.DMA_MODE = 0).
9.1.1.6 I2S_EGRESS_DATA_RIGHT register
The I2S_EGRESS_DATA_RIGHT register is used to add data to the I2S transmit FIFO for the right
channel, when the I2S interface is working in Register mode (I2S_CONFIG.DMA_MODE = 0).
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
0 TXL_DONE R RW 0 Enable reporting of I2S_INTR.TXL_DONE to CPU.
1 TXL_SPACE R RW 0
Enable reporting of I2S_INTR.TXL_SPACE to
CPU.
2 TXL_HALF R RW 0 Enable reporting of I2S_INTR.TXL_HALF to CPU.
3TXR_DONER RW0
Enable reporting of I2S_INTR.TXR_DONE to
CPU.
4TXR_SPACER RW0
Enable reporting of I2S_INTR.TXR_SPACE to
CPU.
5 TXR_HALF R RW 0 Enable reporting of I2S_INTR.TXR_HALF to CPU.
6 PAUSED R RW 0 Enable reporting of I2S_INTR.PAUSED to CPU.
7 NO_DATA R RW 0 Enable reporting of I2S_INTR.NO_DATA to CPU.
8 ERROR R RW 0 Enable reporting of I2S_INTR.ERROR to CPU.
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
31:0 DATA R W 0
Sample to be written to the peripheral.
Number of valid data bits depends on sample
size (see I2S_CONFIG Register on page 99),
other bits are ignored.
Bits Field Name HW Access
SW
Access
Default
Value
Description
31:0 DATA R W 0
Sample to be written to the peripheral.
Number of valid data bits depends on sam-
ple size (see I2S_CONFIG Register on
page 99), other bits are ignored.