FX3 Programmers Manual, Doc. # 001-64707 Rev. *C 117
FX3 Serial Peripheral Register Access
9.1.3.4 UART_INTR_MASK register
This register enables/disables the reporting of UART block interrupts to the ARM CPU.
9.1.3.5 UART_EGRESS_DATA register
This register is used to put data into the UART TX FIFO when transmitting in register mode
(UART_CONFIG.DMA_MODE=0).
9.1.3.6 UART_INGRESS_DATA register
This register is used to read data from the UART RX FIFO when receiving data in register mode.
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
0RX_DONE R RW0
1: Enables reporting of
UART_INTR.RX_DONE to the CPU
1RX_DATA R RW0
1: Enables reporting of
UART_INTR.RX_DATA to the CPU
2RX_HALF R RW0
1: Enables reporting of
UART_INTR.RX_HALF to the CPU
3 TX_DONE R RW 0
1: Enables reporting of
UART_INTR.TX_DONE to the CPU
4 TX_SPACE R RW 0
1: Enables reporting of
UART_INTR.TX_SPACE to the CPU
5TX_HALF R RW0
1: Enables reporting of
UART_INTR.TX_HALF to the CPU
6CTS_STAT R RW0
1: Enables reporting of
UART_INTR.CTS_STAT to the CPU
7 CTS_TOGGLE R RW 0
1: Enables reporting of
UART_INTR.CTS_TOGGLE to the CPU
8 BREAK R RW 0
1: Enables reporting of
UART_INTR.BREAK to the CPU
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
7:0 DATA R W 0
Data byte to be written to the peripheral
in registered mode.
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
7:0 DATA RW R 0
Data byte read from the peripheral when
DMA_MODE=0
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