Passport 2®/Passport 2 LT™ Service Manual 0070-10-0441 2 - 3
Theory of Operation CPU Control Module
SCC4 - This channel is assigned to the serial Recorder. It operates at 3V logic levels and is
connected to Recorder Connector J8. SCC4 will operate in the standard UART mode with all
hardware control lines available.
There are two Serial management Channels called SMC's that are part of the MPC860T's
Communication Processor Module. The following describes the function of each of them.
SMC1 - Not used. Pins used as general purpose I/O.
SMC2 - This channel is assigned to Audio. The audio circuit is composed of three integrated
circuits, Wave Table Music Synthesizer, a 24 Bit Stereo D/A Converter and a one watt
Power Amplifier. It operates at 3V logic levels and is connected to the Keypad/Display J5.
SMC2 will operate in the standard UART mode with no hardware control lines available.
2.1.3 Fast Ethernet Controller
The MPC860T includes a 10/100 BASE-T Ethernet channel. The fast Ethernet Controller is
implemented independently providing fast Ethernet connectivity without effecting the
performance of the CPM. Full duplex 100 Mbps operation is supported at a system clock of
45 Mhz and higher. A 25 Mhz system clock supports 10 Mbps operation or half duplex 100
Mbps operation.
2.1.4 Power-On Reset, U14
The Power-On reset signal is created by components U14, R1, R12, R13 and Q4. The active
low power-on reset signal required by the MPC860T, as well as other components that
require reset, is generated for both logic voltages 5V and 3.3V. This keeps the CPU in reset
until the power for all the digital components are above minimum operating levels. The reset
signal PORESET is distributed in a spoke pattern with the following references, PORESET*,
POREST2*, PORESET3*, PORESET4*, and PORESET5*. The duration of the power-on reset
signal is 140ms min. The MPC860T requires only 3us minimum after power is stable and all
other components that receive this reset require less than 1ms.
2.1.5 Flash Memory, U3, U4, U5, U6, U180, U181, U182, U183
Program code is stored in eight flash memory devices configured as 2M x 32 bytes in 2
banks for a total of 16 Mbytes. These devices allow for in circuit programming via the
MPC860T background debug mode (BDM). There are no special programming voltages,
programming is done using the existing 3.3Volts.
This is one way to allow for initial factory programming as well as software upgrades.
Alternately a boot loader can be programmed into the flash parts using the BDM, and the
initial software and all upgrades can be programmed into the flash by the boot loader from
a PCMCIA memory card.
The Flash devices are configured and connected to the processor in the byte mode. The
specified access time for the Flash devices is 90nsec and will therefore require 4 wait states.
Upon reset, the MPC860T provides a boot chip select CS(0) which is hard wired to the flash
memory to allow boot of the operating software. The board support software must execute
prior to any other external or internal hardware, in order to function properly.
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