NIBP Module (P/N 0997-00-0501) Theory of Operation
2 - 26 0070-10-0441 Passport 2®/Passport 2 LT™ Service Manual
The ADC uses an external reference voltage (T5V). Since T5V is the same voltage source that
is powering the ratiometric transducer, direct ADC readings represent the pressure.
In addition to the input signals MODE2:0 and PVO, the PIC16 also has the 2.5V reference
voltage (25VR) applied to its A/D inputs. This signal is used as an ‘back-door’ verification of
the T5V reference voltage. Since 25VR is generated from a separate supply than T5V, and
since T5V is also used as the ADC reference voltage, if the T5V reference voltage were to
fail, the ADC would read full scale when comparing 25VR to the ADC reference (T5V).
The PIC16 device includes a brown-out reset circuit which guarantees the device is reset
when VCC is below 3.7V. As long as the PIC16LC version is used, the device is guaranteed
to be reset if its minimum allowed supply voltage is not present. This brown-out reset is
required since the PIC16 is not connected to the HC16Z1 RST*.
To increase the reliability of the PIC16 device’s function as an over-pressure detector, sleep
mode will not be utilized. This prevents the possibility of the part becoming stuck in the sleep
state.
2.4.10 Memory
Flash Memory
The program code will be stored in an Intel 28F400B5 4Mbit flash memory. The flash device
specified has the boot sector located at the bottom of the memory map at address 00000H
where the HC16Z1 expects to find the reset vectors.
Although the flash device requires additional power with CE* tied low, this prevents the need
for decoding logic where board real estate is limited.
Besides storing program code, other unprotected sectors of the flash memory may be used to
store less critical nonvolatile data if required. This would require dedicating an entire flash
sector for that purpose. However, due to small 8K byte parameter blocks in the flash, this is
not a gross waste of memory resources and prevents the need for an additional device.
2.4.11 CMOS Static RAM
The CMOS SRAM is composed of two Sony CXK58100AM 128k-word x 8-bit parts, each
with its own chip select signal, CSRAMLB* and CSRAMHB*, connected to the CS1* pins.
The HC16Z1 R/W* signal is used to activate the SRAM WE* pins while the OE* pins are
held low and the CS2 pins are held high to default the part to the read mode. Although this
much memory is unlikely to be needed during normal operation, it will help when updating
the flash in the field from the host. During this process, the HC16Z1 program code must
reside in the SRAM with additional room available for buffering data received from the host.
To Next Page
Loading...
