NIBP Module (P/N 0997-00-0501) Theory of Operation
2 - 28 0070-10-0441 Passport 2®/Passport 2 LT™ Service Manual
2.4.14 Host Reset
The MODRESET* signal from J1 allows the host to reset the main processor (HC16Z1) on the
PCB. A NOR gate (U14) inverts the signal and the Q7 FET pulls RST* low when
MODRESET* is activated.
RST* is pulled up by R17. This resistor’s value was chosen in order to meet the RST* timing
requirements of the HC16Z1. If the RST* rise time is too slow, the HC16Z1 will assume there
is an external reset and repeatedly drive RST* low itself. This rise time is governed by the
capacitive loads on RST* as well.
VPP is pulled up to VCC by R44 during normal device operation which activates the PIC16
power-on-reset.
NOTE: RST* is not connected to the PIC16 MCLR* input (VPP) in
order to prevent an HC16Z1 reset from bringing the PCB out
of the emergency shutdown state.
To Next Page
Loading...
