Front End Module Theory of Operation
2 - 20 0070-10-0441 Passport 2®/Passport 2 LT™ Service Manual
The other timer channel pins (Port GP 5..7) are unused, and should be configured as outputs,
to eliminate the need for termination. However, the associated internal timer channels may
be used for software purposes, such as the 2 ms data acquisition interrupt, flash
programming timer, etc.
2.2.15 Data Packets
The data communications via the UART and communication isolation circuits are in the form
of bursts, or packets, of data.
The SCI is used to support the RS-485 module bus interface, operating at 500 kbaud. The
SCI is operated in the 9 bit mode. In the module bus protocol, ninth bits are set only when a
module address is transmitted. Most of the time, the SCI is operated in the Address Mark
Wake-Up mode. In this mode, it ignores all characters without the ninth bit set. Each time an
address is sent on the module bus, the receiver will generate an interrupt on this character.
Software must rapidly evaluate this character to determine if it matches the module address.
If it does not match, the SCI mode remains unchanged, and the bus continues to be
monitored for address characters only. However, if there is a match, the SCI must
immediately be placed in the normal receive mode, so that the rest of the poll packet can be
received and buffered. The CRC is evaluated during reception. If the poll packet CRC is
valid, the transmitter is enabled, and SCI is used to transmit a pre-buffered response packet.
Following this packet, the transmitter is disabled, and the SCI is returned to the Address Mark
Wake-Up mode. Control of the transmitter is by means of peripheral select 3 (Port PQS 6),
which is brought low to enable the RS-485 transmitter.
Because of the high data transmission speed, each of the phases of module bus
communications is best handled through a separate ISR, with the interrupt vector being
changed for each phase. This will result in faster response than could be achieved in a single
ISR with conditional code. The SCI must be the highest priority peripheral interrupt in the
system, due to the high communication speed.
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