DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
82
J7L LCD connector
VGA-LCD Interface (flatpanel signals):
Signals P20-P23 are located on the J7M connector
Pin Signal Pin Signal
1 M / DE Signal 2 FLM
3 P18 4 Line Pulse LP
5 VCC-LCD (1A),
Selected by J51
6 GND
7 VEESAVE (5V/1A) 8 Shift Clock
9 VBACKSAVE (12V/1A) 10 P3
11 P2 12 P17
13 P1 14 P16
15 P0 16 P7
17 Contrast resistor pin 1 *) 18 P6
19 Contrast resistor pin 2 *) 20 P5
21 P4 22 P19
23 P8 24 P9
25 P10 26 P11
27 P12 28 P13
29 P14 30 P15
Rem:
- Pin 9 (+12V) will be supplied from J48 (pin 4) or J40 (pin B9).
*)
Contrast electronics is not assembled
- Contrast is reserved to be controlled via INT15 in later bios versions.