EDR-5000 IM02602007E
Testing the trip delay (PF Trigger: Example = 0.86 lagging):
• Feed the rated voltage and rated current in phase to the measuring inputs of the relay (PF=1).
• Adjust the angle between voltage and current (current pointer lagging) with an abrupt change to
PF = 0.707 (45°) lagging.
• Measure the tripping delay at the output of the relay. Compare the measured tripping time to the selected trip
time.
Successful test result:
The measured total tripping delays, threshold, and reset values correspond with those values specified in the adjust-
ment list. Permissible deviations/tolerances can be found the Technical Data section.
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