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GE F60
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B-94 F60 Feeder Protection System GE Multilin
B.4 MEMORY MAPPING APPENDIX B
B
[13] CONTACT OUTPUTS CURRENT OFF DETECTED (1 to 64)
[14] REMOTE INPUTS (1 to 32)
[16] DIRECT INPUTS (1 to 96)
[18] REMOTE OUTPUT DNA BIT PAIRS (1 to 32)
[20] REMOTE OUTPUT UserSt BIT PAIRS (1 to 32)
[22] REMOTE DEVICE ONLINE (1 to 16)
[24] MISCELLANEOUS EQUATION
[26] TELEPROTECTION INPUTS
[28] INSERT (via keypad only)
[30] DELETE (via keypad only)
[32] END
[34] NOT (1 INPUT)
[36] 2 INPUT XOR (0)
[38] LATCH SET/RESET (2 inputs)
[40] OR (2 to 16 inputs)
[42] AND (2 to 16 inputs)
[44] NOR (2 to 16 inputs)
[46] NAND (2 to 16 inputs)
[48] TIMER (1 to 32)
[50] ASSIGN VIRTUAL OUTPUT (1 to 64)
[52] ONE SHOT
[54] SELF-TEST ERROR (see F141 for range)
[56] PLATFORM DIRECT INPUT (1 to 96)
[58] PLATFORM DIRECT OUTPUT (1 to 96)
[60] PLATFORM DIRECT DEVICE (1 to 8)
[62] MISCELLANEOUS EVENTS (see F146 for range)
[64] PDC NETWORK CONTROL
[66] PMU RECORDER OUT OF MEMORY
[68] PMU RECORDER STOPPED
[128 to 255] ELEMENT STATES (see the Element States section
in the Modbus memory map)
F400
UR_UINT16: CT/VT BANK SELECTION
F491
ENUMERATION: ANALOG INPUT MODE
0 = Default Value, 1 = Last Known
F500
UR_UINT16: PACKED BITFIELD
First register indicates input/output state with bits 0 (MSB) to 15
(LSB) corresponding to input/output state 1 to 16. The second reg-
ister indicates input/output state with bits 0 to 15 corresponding to
input/output state 17 to 32 (if required). The third register indicates
input/output state with bits 0 to 15 corresponding to input/output
state 33 to 48 (if required). The fourth register indicates input/out-
put state with bits 0 to 15 corresponding to input/output state 49 to
64 (if required).
The number of registers required is determined by the specific
data item. A bit value of 0 = Off and 1 = On.
F501
UR_UINT16: LED STATUS
Low byte of register indicates LED status with bit 0 representing
the top LED and bit 7 the bottom LED. A bit value of 1 indicates
the LED is on, 0 indicates the LED is off.
0 = Off, 1 = On
F502
BITFIELD: ELEMENT OPERATE STATES
Each bit contains the operate state for an element. See the F124
format code for a list of element IDs. The operate bit for element ID
X is bit [X mod 16] in register [X/16].
F515
ENUMERATION ELEMENT INPUT MODE
0 = Signed, 1 = Absolute
F516
ENUMERATION ELEMENT COMPARE MODE
0 = Level, 1 = Delta
F517
ENUMERATION: ELEMENT DIRECTION OPERATION
0 = Over, 1 = Under
F518
ENUMERATION: FLEXELEMENT UNITS
0 = Milliseconds, 1 = Seconds, 2 = Minutes
F519
ENUMERATION: NON-VOLATILE LATCH
0 = Reset-Dominant, 1 = Set-Dominant
F522
ENUMERATION: TRANSDUCER DCmA OUTPUT RANGE
0 = –1 to 1 mA, 1 = 0 to 1 mA, 2 = 4 to 20 mA
F523
ENUMERATION: DNP OBJECTS 20, 22, AND 23 DEFAULT
VARIATION
Bitmask Bank selection
0 Card 1 Contact 1 to 4
1 Card 1 Contact 5 to 8
2 Card 2 Contact 1 to 4
3 Card 2 Contact 5 to 8
4 Card 3 Contact 1 to 4
5 Card 3 Contact 5 to 8
Bitmask Default variation
01
12
25
36

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