5. Control Input / Output
5-4
Sequence input (fig 5-2)
Sequence output (fig 5-5)
Analog input (fig 5-7)
Analog output (fig 5-8)
d01-0,1
Changeover with
sequence input
Addition point
Multiplication point
+
-
Monitor Output
Automatic Speed Regulator
Automatic Current Regulator
ASR
ACR
Speed
setting
(fig 5-9)
Ramp 1
A01-0,1
Ramp 2
B10-0,1
ON
F/R
ON
+
-
+
+
+
PI control
P control
ASR
response
(fig 5-17)
Machine time
constant
(fig 5-16)
d00-0, 3
Load
torque
observer
Ramp
d01-4 d01-3
d11-1, 3
Drooping
B13-5
Internal
setting
Term inal
block
d11-4
d11-0
d03-2
Output
power
calculation
Iron loss
resistance
B02-8,9
Iron loss
compensation
R2 comp.
Slip
frequency
calculation
++
ω
1
Inverter
section
Heatsink tempe-
rature detection
Vce com-
pensation
Current
detection
Flux Observer
& Speed estimation
Speed
detection
Control mode
C30-0
Primary resistance, B02-0,1
Secondary resistance, B02-2,3
Leakage inductance, B02-4,5
Excitation inductance, B02-6,7
=4
=3
PP
HCT
Converter
section
Power
supply
ON
x
x
EXC
EXC
0
i*
d
i*
d
i*
q
i*
q
Secondary
resistance
B02-2,3
d03-0
d03-1,3
d02-2
ω
r
ω
r
d02-3
ACR
ASR
Gate
output
d02-4,5
DC voltage
detection
Torque
setting
(fig 5-10)
Torque setting
master output
(ISB II option)
Torque ratio 2
setting
(fig 5-15)
A.X
T2 1
A
T2
X
1
A.X+B
T1 T1
B
T1
A
T1
Torque ratio 1
setting
(fig 5-14)
Torque bias 2
setting slave
input
(ISB II option)
Torque bias 1
setting
(fig 5-11)
Regenerative
torque limiter
(fig 5-13)
Drive torque
lim iter
(fig 5-12)
CPASS
Constant power
compensation
d12-0
d02-0,1
IM
M fluctuation
compensation
No-load output voltage B01-9
Leakage inductance B02-4,5
Exciting inductance Bo2-6,7
DEDB
ACR
PCTL
ON
ON
ON
Limiter
CSEL
DROOP
ON
x
0
Dead band
(B14-0)
+
+
DCB
DCB
+
+
+
1+
T
Fig. 5-1 Control Block diagram
x