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Harris APEX User Manual
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APEX
™
Exciter Incorporating FLO
™
T
echnology
Maintenance and Tr
oubleshootin
g
Exciter Maintenance
Page: 5-2
888
-2604-001
03/08/07
W
ARNING: Disconnect primary power prior to servicing.
8439153013A.PLT
Figure 5-1 Top View of Excite
r (Analog Side) Wi
th Cover Removed
117
119
Table of Contents
Table of Contents
11
List of Tables
21
1 Introduction
23
Organization of Technical Manual
23
General Description
23
Physical Description
24
Figure 1-1 Rear Panel View APEX Exciter Incorporating FLO Technology
24
Figure 1-2 APEX Exciter Front Panel View
25
Technical Overview
26
Specifications
26
Table 1-1 Harris APEX Exciter General Specifications
26
Table 1-2 Harris APEX Exciter Service Conditions Specifications
27
Table 1-3 Harris APEX Exciter Performance Specifications
28
2 Installation
29
Introduction
29
Installing Exciters Removed for Shipment
29
Signal Connections
29
AC Power
30
Installation of the GPS 1PPS Signal
30
Figure 2-1 Exciter Inputs and Outputs
30
Retrofitting into Existing Transmitter System
31
Feedback Requirements
31
Figure 2-2 1PPS Signal Termination Methods
31
Feedback Signal Quality Requirements
32
Typical Transmitter Systems Block Diagrams
32
Atlas Mobile Transmitter - 1 PA Cabinet, 2 Exciters
33
Atlas Mobile Transmitters
33
Figure 2-3 Atlas Mobile Transmitter - Single PA Cabinet - Dual Exciters
33
Atlas Mobile Transmitter - 2 or more PA Cabinets
34
Figure 2-4 Atlas Mobile Transmitter - Dual PA Cabinets - Dual Exciters
34
Configuring the Exciter
35
Configuration of Setup Screens
35
Configuration of Status Screens
37
Normal Settings for Diagnostic Screens
38
Materials Needed
39
3 Navigating the LCD Display Screens
41
Basic Operating Procedure
41
Exciter Fault Display - Red
41
Fault Warning - Yellow
41
Raising or Lowering Output Power
41
Starting Point: the Main LCD Touch Screen
42
Figure 3-1 LCD Main Screen
42
Exciter Setup Series of Screens
43
Exciter Status Series of Screens
43
Spectrum Response Screen
43
FLO Measure Soft Key
44
LCD Display Flow Chart
44
Figure 3-2 APEX Exciter LCD Display Flow Chart, Main Screen
45
Figure 3-5 System Status Screen
46
Details of the Exciter Status Screens
48
System Status Screen
48
Table 3-1 System Status Screen Circuit Board Names
48
Adaptive Processing Board Status Screen
49
Figure 3-6 Transport Stream Status Screen
49
Figure 3-7 Adaptive Processing Board Status Screen
49
Transport Stream Status Screen
49
Adaptive Processing Diagnostics
51
Figure 3-8 Adaptive Processing Diagnostics
51
Digital Processing Screens
52
Figure 3-9 Modulation Board Status Screen
52
Modulator Board Status, Screen 1/2
52
ADC and DAC Boards Status, Screen 2/2
53
FLO FPGA Status, Summary, Screen 1/5
54
FLO FPGA, GPS & Clock Status, Screen 2/5
55
FLO FPGA, Transport Stream Status, Screen 3/5
56
FLO FPGA, SFN FIFO Status, Screen 4/5
57
FLO FPGA, MTI Status, Screen 5/5
58
IF & RF Processing Status Screens
59
UDC Interface Board Status, Screen 1/4
59
Figure 3-18 PLL Board Status Screen
60
PLL Board Status Screen
60
3.4.5.2.1 PLL Diagnostics
61
Figure 3-19 PLL Diagnostics
61
Figure 3-20 up Converter Board Status Screen
61
Up Converter Board Status Screen
61
3.4.5.3.1 up Converter Diagnostics
62
Figure 3-21 up Converter Diagnostics
62
Down Converter Board Status Screen
63
Figure 3-22 down Converter Board Status Screen
63
3.4.5.4.1 down Converter Diagnostics
64
Figure 3-23 down Converter Diagnostics
64
System Control Status Screens
65
3.4.6.1.1 Controller Board Diagnostics
66
Controller Board Status Screen
66
Figure 3-24 Controller Board Status Screen
66
External I/O Board Status Screen
67
Figure 3-25 External I/O Board Status Screen
67
3.4.6.2.1 External I/O Diagnostics
68
Figure 3-26 External I/O Diagnostics
68
3.4.6.3.1 CAN Diagnostics
70
CAN Bus Status Screen
70
Figure 3-27 CAN Bus Status Screen
70
Figure 3-28 Front Panel Board Status Screen
70
Front Panel Board Status Screen
70
Figure 3-29 Front Panel Board Status Screen
71
GPS Status Screen
71
Built in Tests
72
Details of the System Setup Screens
72
Figure 3-30 Built in Tests Screen
72
Figure 3-31 System Setup Screen
72
Restore Defaults Operation
73
Table 3-3 Settings Resulting from Restore Defaults Activation
73
Exciter Setup Screen
75
Figure 3-32 Exciter Setup Screen
75
Figure 3-33 Power Calibration Screen
78
Figure 3-34 RTAC Setup Screen
78
Power Calibration
78
RTAC Setup Screen
78
Filter Type
80
Max Peak Stretch
80
RTAC Power on Mode
80
Display Setup Screen
81
Figure 3-35 Display Setup Screen
81
RTAC off Air Mode
81
External I/O Setup Screen
82
Figure 3-36 External I/O Setup Screen
82
RF Present Cutoff
83
VSWR Foldback Parameters
83
External I/O Interface to Transmitter Control Logic
84
Table 3-4 UHF External I/O Parallel Control Interface Connector J1
84
Serial I/O Setup Screens
85
Serial Setup Screen 1 of 3, RS-232
85
Figure 3-38 Serial Setup Screen 2 of 3, Ethernet
86
Serial Setup Screen 2 of 3, Ethernet
86
Figure 3-39 Serial Setup Screen 3 of 3, CAN
87
Serial Setup Screen 3 of 3, CAN
87
FPGA Configure 1/5
88
FPGA Setup
88
FPGA Configure 2/5
89
Figure 3-42 FPGA Configure 3/5
90
FPGA Configure 3/5
90
FPGA Configure 4/5
91
Figure 3-44 FPGA Configure 5/5, Restore Defaults
92
FPGA Configure 5/5, Restore Defaults
92
Change Passwords > Security Setup
93
Figure 3-45 Security Setup Screen
93
Diagnostics Setup (Locked or Unlocked)
94
Figure 3-46 System Setup Screen
94
User Setup (Locked or Unlocked)
94
Factory Setup (Locked or Unlocked)
95
Restore Defaults
95
RTAC Operating Procedures, Main Screen
95
From RTAC Section of Main Screen
95
From Adaptive Precorrection Board Status Screen
96
From down Converter Board Status Screen
96
From down Converter Diagnostics Screen
96
From RTAC Setup Screen
97
4 Theory of Operation
99
General Description
99
Transmitter Systems Block Diagram
99
APEX Exciter Digital Assembly Overview
100
Figure 4-1 APEX Exciter/ Transmitter - RF Interconnection Block Diagram
100
Controller Board Theory
101
Figure 4-2 APEX Exciter - Signal Flow Block Diagram
102
RTAC and Adaptive Precorrector Board Theory
103
44.4 Mhz Phase Lock Loop
104
Exciter Output Spectral Response, RTAC Bypassed
104
Figure 4-3 the 44.4 Mhz Phase Lock Loop
104
Table 4-1 Output Signal Bandwidth
104
APEX Exciter Analog Assembly Overview
105
Figure 4-4 Exciter Output Spectral Response, RTAC Bypassed
105
Up Converter Board Block Diagram Description
106
Up Converter Board UHF/VHF Band Pass Filter
106
Down Converter Board Block Diagram Description
107
Figure 4-5 up Converter Simplified Block Diagram
107
10 Mhz Reference
108
Figure 4-6 Analog Assembly Detailed Block Diagram
108
PLL Board - A4
108
Figure 4-7 10 Mhz Reference Oscillator Block Diagram
109
Figure 4-8 Block Diagram First lo
109
Mhz if PLL (First L. O.)
109
Figure 4-9 Block Diagram Main Phase Lock Loop (2Nd LO)
110
Main Phase Lock Loop (Second LO)
110
Table 4-2 2Nd lo Output Frequencies
110
Figure 4-10 Output RF Amplifier Block Diagram
111
Output Amplifier
111
DC Power Distribution
112
Controller Board Power
112
Digital Deck Power
112
Main Power Supply
112
Table 4-3 Exciter Power Supply Voltages
112
Adaptive Processing Board Power
113
FPGA Modulator Board Power
113
Power for DAC and ADC Boards
113
Analog Deck Power
114
Exciter Cooling Fan Power
114
External I/O Board Power
114
Front Panel Board
114
UDC Interface Board Power
114
Down Converter Board Power
115
PLL Board Power
115
Output Amplifier
116
Up Converter Board Power
116
5 Maintenance and Troubleshooting
117
Exciter Maintenance
117
Cleaning
117
Figure 5-1 Top View of Exciter (Analog Side) with Cover Removed
118
Figure 5-2 Bottom View of Exciter (Digital Side) with Cover Removed
119
Figure 5-3 APEX Exciter Wiring Diagram, Left Side (See Figure 5-4 for Right Side)
120
Figure 5-4 APEX Exciter Wiring Diagram, Right Side (See Figure 5-3 for Left Side)
121
Measuring Center Channel Frequency
122
Measuring PLL Board Frequencies
122
Measuring the 1St Local Oscillator Frequency
124
Measuring the 2Nd Local Oscillator Frequency
124
PLL Board 10 Mhz Reference Oscillator Frequency
124
Loading Software
125
Default Settings for Diagnostics Screens
126
Table 5-1 Diagnostics Screens Default Settings
126
Typical Settings for the more Critical Exciter Setups
127
Table 5-2 Typical Settings for some of the more Critical Exciter Setup Functions
127
Exciter Troubleshooting Flow Charts
128
Figure 5-5 Frequency Error Troubleshooting Flow Chart
128
Figure 5-6 Low or no Output Power Troubleshooting Flow Chart
128
Figure 5-7 Transmitter Fails Mask Test Troubleshooting Flow Chart
130
Figure 5-8 Transmitter Has Excessive MER Troubleshooting Flow Chart
131
General Troubleshooting
132
Troubleshooting Tips
132
System Troubleshooting
133
PA, HPF, or ADC Adaptive Processing Faults
133
Transmitter Response Not Conforming to Mask Requirements
133
ASI Transport Stream Faults
134
Checking Transmitter Spectrum
134
Exciter Troubleshooting
135
Dark Screen
135
Frequency Error
135
Power Supply Voltages
136
Table 5-3 Exciter Power Supply Voltages
136
Analog Tray Signal Path
137
Checking Operation of the Entire Digital Tray
137
Digital Tray Transmission Data Path
137
Isolating Problem to the Analog or Digital Tray
137
Troubleshooting down to the Board Level
137
Checking Operation of the Entire Exciter
138
Isolating a Faulty Board in the Digital Tray
139
Modulator Board
139
Adaptive Precorrector Board
140
ADC and DAC Boards
140
Controller Board
140
Front Panel Board
140
Analog Tray Troubleshooting
141
Table 5-4 Analog Tray RF Input and Output Levels
141
Figure 5-9 Exciter Output Spectral Response, RTAC Bypassed
142
Table 5-5 Phase Noise Mask
142
Table 5-6 Output Signal Bandwidth
142
6 Parts List
143
Appendix Aexciter GUI Screen Captures
145
4
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Harris APEX Specifications
General
Brand
Harris
Model
APEX
Category
Transmitter
Language
English
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