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Hitachi EH-150 Series - Error Check

Hitachi EH-150 Series
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Appendix
A - 4
A.2.3 Error check
(1) LRC check
The error check field based on the Longitudinal Redundancy Check (LRC) is included in the message frame in
ASCII mode. The target of LRC calculation is a portion (Device address, Function code, data) except the header
(colon) and the terminator (CR/LF).
A procedure for generating LRC is:
1. Add all bytes in the message, excluding the starting ‘colon’ and ending CRLF. Add them into an 8bit field, so
that carries will be discarded.
2. Subtract the final field value from FF hex, to produce the onescomplement.
3. Add 1 to produce the twoscomplement.
LRC calculation
Target data
exist ?
YES
NO
LRC = H00
LRC =
LRC + Target data
LRC 2s complement
END
Figure A.2 Calculation procedure of LRC
Ex. ) When coil information is read from the coil address 0000 (16 bits) of a slave (Device No. 08)
Query
Field Name
(HEX)
Device No.
08
0000
1000
Function code
01
0000
0001
Top address of coil (High)
00
0000
0000
Top address of coil (Low)
00
0000
0000
Number of coils (High)
00
0000
0000
Number of coils (Low)
10
+
0001
0000
0001
1001
2s complement calculated
1110
0110
+
1
1110
0111
LRC
E7
E
7

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