Rev. 1.50 130 August 28, 2017 Rev. 1.50 131 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
Serial Interface Module – SIM
ThesedevicescontainaSerialInterfaceModule,whichincludesboththefour-lineSPIinterfaceor
two-lineI
2
Cinterfacetypes,toallowaneasymethodofcommunicationwithexternalperipheral
hardware.Havingrelativelysimplecommunicationprotocols,theseserialinterfacetypesallow
themicrocontrollertointerfacetoexternalSPIorI
2
Cbasedhardwaresuchassensors,Flashor
EEPROMmemory,etc.TheSIMinterfacepinsarepin-sharedwithotherI/Opinsandthereforethe
SIMinterfacefunctionalpinsmustfirstbeselectedusingthecorrespondingpin-sharedfunction
selectionbits.Asbothinterfacetypessharethesamepinsandregisters,thechoiceofwhetherthe
SPIorI
2
CtypeisusedismadeusingtheSIMoperatingmodecontrolbits,namedSIM2~SIM0,in
theSIMC0register.Thesepull-highresistorsoftheSIMpin-sharedI/Opinsareselectedusingpull-
highcontrolregisterswhentheSIMfunctionisenabledandthecorrespondingpinsareusedasSIM
inputpins.
SPI Interface
TheSPIinterfaceisoftenusedtocommunicatewithexternalperipheraldevicessuchassensors,
FlashorEEPROMmemorydevices,etc.OriginallydevelopedbyMotorola,thefourlineSPI
interfaceisasynchronousserialdatainterfacethathasarelativelysimplecommunicationprotocol
simplifyingtheprogrammingrequirementswhencommunicatingwithexternalhardwaredevices.
Thecommunicationisfullduplexandoperatesasaslave/mastertype,wherethedevicescanbe
eithermasterorslave.AlthoughtheSPIinterfacespecicationcancontrolmultipleslavedevices
fromasinglemaster,thesedevicesprovidedonlyoneSCSpin.Ifthemasterneedstocontrol
multipleslavedevicesfromasinglemaster,themastercanuseI/Opintoselecttheslavedevices.
SPI Interface Operation
TheSPIinterfaceisafullduplexsynchronousserialdatalink.Itisafourlineinterfacewithpin
namesSDI,SDO,SCKandSCS.PinsSDIandSDOaretheSerialDataInputandSerialData
Outputlines,SCKistheSerialClocklineandSCSistheSlaveSelectline.AstheSPIinterfacepins
arepin-sharedwithnormalI/OpinsandwiththeI
2
Cfunctionpins,theSPIinterfacepinsmustrst
beselectedbyconguringthepin-sharedfunctionselectionbitsandsettingthecorrectbitsinthe
SIMC0andSIMC2registers.AfterthedesiredSPIcongurationhasbeensetitcanbedisabledor
enabledusingtheSIMENbitintheSIMC0register.Communicationbetweendevicesconnected
totheSPIinterfaceiscarriedoutinaslave/mastermodewithalldatatransferinitiationsbeing
implementedbythemaster.TheMasteralsocontrolstheclocksignal.Asthedevicesonlycontain
asingleSCSpinonlyoneslavedevicecanbeutilized.TheSCSpiniscontrolledbysoftware,set
CSENbitto1toenableSCSpinfunction,setCSENbitto0theSCSpinwillbeoatingstate.
TheSPIfunctioninthesedevicesofferthefollowingfeatures:
• Fullduplexsynchronousdatatransfer
• BothMasterandSlavemodes
• LSBrstorMSBrstdatatransmissionmodes
• Transmissioncompleteag
• Risingorfallingactiveclockedge
ThestatusoftheSPIinterfacepinsisdeterminedbyanumberoffactorssuchaswhetherthedevices
areinthemasterorslavemodeandupontheconditionofcertaincontrolbitssuchasCSENand
SIMEN.