Holtek HT66F0175 - U�RT Set�P and Control

Rev. 1.50 162 August 28, 2017 Rev. 1.50 163 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
UART Setup and Control
Fordatatransfer,theUARTfunctionutilizesanon-return-to-zero,morecommonlyknownasNRZ,
format.Thisiscomposedofonestartbit,eightorninedatabitsandoneortwostopbits.Parity
issupportedbytheUARThardwareandcanbesetuptobeeven,oddornoparity.Forthemost
commondataformat,8databitsalongwithnoparityandonestopbit,denotedas8,N,1,isused
asthedefaultsetting,whichisthesettingatpower-on.Thenumberofdatabitsandstopbits,along
withtheparity,aresetupbyprogrammingthecorrespondingBNO,PRT,PRENandSTOPSbitsin
theUCR1register.Thebaudrateusedtotransmitandreceivedataissetupusingtheinternal8-bit
baudrategenerator,whilethedataistransmittedandreceivedLSBrst.Althoughthetransmitter
andreceiveroftheUARTarefunctionallyindependent,theybothusethesamedataformatandbaud
rate.Inallcasesstopbitswillbeusedfordatatransmission.
Enabling/Disabling the UART Interface
Thebasicon/offfunctionoftheinternalUARTfunctioniscontrolledusingtheUARTENbitinthe
UCR1register.IftheUARTEN,TXENandRXENbitsareset,thenthesetwoUARTpinswillact
asnormalTXoutputpinandRXinputpinrespectively.IfnodataisbeingtransmittedontheTX
pin,thenitwilldefaulttoalogichighvalue.
ClearingtheUARTENbitwilldisabletheTXandRXpinsandthesetwopinswillbeusedasI/
Oorotherpin-sharedfunctionalpins.WhentheUARTfunctionisdisabled,thebufferwillbe
resettoanemptycondition,atthesametimediscardinganyremainingresidualdata.Disablingthe
UARTwillalsoresettheenablecontrol,theerrorandstatusagswithbitsTXEN,RXEN,TXBRK,
RXIF,OERR,FERR,PERRandNFbeingclearedwhilebitsTIDLE,TXIFandRIDLEwillbe
set.TheremainingcontrolbitsintheUCR1,UCR2andBRGregisterswillremainunaffected.
IftheUARTENbitintheUCR1registerisclearedwhiletheUARTisactive,thenallpending
transmissionsandreceptionswillbeimmediatelysuspendedandtheUARTwillberesettoa
conditionasdenedabove.IftheUARTisthensubsequentlyre-enabled,itwillrestartagaininthe
sameconguration.
Data, Parity and Stop Bit Selection
Theformatofthedatatobetransferrediscomposedofvariousfactorssuchasdatabitlength,
parityon/off,paritytype,addressbitsandthenumberofstopbits.Thesefactorsaredeterminedby
thesetupofvariousbitswithintheUCR1register.TheBNObitcontrolsthenumberofdatabits
whichcanbesettoeither8or9.ThePRTbitcontrolsthechoiceifoddorevenparity.ThePREN
bitcontrolstheparityon/offfunction.TheSTOPSbitdecideswhetheroneortwostopbitsareto
beused.Thefollowingtableshowsvariousformatsfordatatransmission.Theaddressdetectmode
controlbitidentiestheframeasanaddresscharacter.Thenumberofstopbits,whichcanbeeither
oneortwo,isindependentofthedatalength.
Start Bit Data Bits Address Bits Parity Bit Stop Bit
Example of 8-bit Data Formats
1 8 0 0 1
1 7 0 1 1
1 7 1 0 1
Example of 9-bit Data Formats
1 9 0 0 1
1 8 0 1 1
1 8 1 0 1
Transmitter Receiver Data Format