Holtek HT66F0175 - I � C B�S Comm�Nication

Rev. 1.50 140 August 28, 2017 Rev. 1.50 141 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
Bit0 RXAK:I
2
Cbusreceiveacknowledgeag
0:Slavereceivesacknowledgeag
1:Slavedoesnotreceiveacknowledgeag
TheRXAKflagisthereceiveracknowledgeflag.WhentheRXAKflagis“0”,it
meansthataacknowledgesignalhasbeenreceivedatthe9thclock,after8bitsofdata
havebeentransmitted.Whentheslavedeviceinthetransmitmode,theslavedevice
checkstheRXAKagtodetermineifthemasterreceiverwishestoreceivethenext
byte.TheslavetransmitterwillthereforecontinuesendingoutdatauntiltheRXAK
agis“1”.Whenthisoccurs,theslavetransmitterwillreleasetheSDAlinetoallow
themastertosendaSTOPsignaltoreleasetheI
2
CBus.
I
2
C Bus Communication
CommunicationontheI
2
Cbusrequiresfourseparatesteps,aSTARTsignal,aslavedeviceaddress
transmission,adatatransmissionandfinallyaSTOPsignal.WhenaSTARTsignalisplacedon
theI
2
Cbus,alldevicesonthebuswillreceivethissignalandbenotiedoftheimminentarrivalof
dataonthebus.Therstsevenbitsofthedatawillbetheslaveaddresswiththerstbitbeingthe
MSB.Iftheaddressoftheslavedevicematchesthatofthetransmittedaddress,theHAASbitinthe
SIMC1registerwillbesetandanI
2
Cinterruptwillbegenerated.Afterenteringtheinterruptservice
routine,theslavedevicemustrstchecktheconditionoftheHAASandSIMTOFbitstodetermine
whethertheinterruptsourceoriginatesfromanaddressmatch,8-bitdatatransfercompletionor
I
2
Cbustime-outoccurrence.Duringadatatransfer,notethatafterthe7-bitslaveaddresshasbeen
transmitted,thefollowingbit,whichisthe8thbit,istheread/writebitwhosevaluewillbeplacedin
theSRWbit.Thisbitwillbecheckedbytheslavedevicetodeterminewhethertogointotransmitor
receivemode.BeforeanytransferofdatatoorfromtheI
2
Cbus,themicrocontrollermustinitialise
thebus,thefollowingarestepstoachievethis:
• Step1
SettheSIM2~SIM0bitsto“110”andSIMENbitto“1”intheSIMC0registertoenabletheI
2
C
bus.
• Step2
WritetheslaveaddressofthedevicetotheI
2
CbusaddressregisterSIMA.
• Step3
SettheSIMEinterruptenablebitoftheinterruptcontrolregistertoenabletheSIMinterrupt.


   





  


  
    
  

   


  
  
I
2
C Bus Initialisation Flow Chart