Holtek HT66F0175 - Page 140

Rev. 1.50 140 August 28, 2017 Rev. 1.50 141 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
SIMC1 Register
Bit 7 6 5 4 3 2 1 0
Name HCF HAAS HBB HTX TXAK SRW IAMWU RXAK
R/W R R R R/W R/W R/W R/W R
POR 1 0 0 0 0 0 0 1
Bit7 HCF:I
2
CBusdatatransfercompletionag
0:Dataisbeingtransferred
1:Completionofan8-bitdatatransfer
TheHCFflagisthedatatransferflag.Thisflagwillbezerowhendataisbeing
transferred.Uponcompletionofan8-bitdatatransfertheflagwillgohighandan
interruptwillbegenerated.
Bit6 HAAS:I
2
CBusaddressmatchag
0:Notaddressmatch
1:Addressmatch
TheHAASagistheaddressmatchag.Thisagisusedtodetermineiftheslave
deviceaddressisthesameasthemastertransmitaddress.Iftheaddressesmatchthen
thisbitwillbehigh,ifthereisnomatchthentheagwillbelow.
Bit5 HBB:I
2
CBusbusyag
0:I
2
CBusisnotbusy
1:I
2
CBusisbusy
TheHBBflagistheI
2
Cbusyflag.Thisflagwillbe“1”whentheI
2
Cbusisbusy
whichwilloccurwhenaSTARTsignalisdetected.Theagwillbesetto“0”when
thebusisfreewhichwilloccurwhenaSTOPsignalisdetected.
Bit4 HTX:I
2
Cslavedevicetransmitter/receiverselection
0:Slavedeviceisthereceiver
1:Slavedeviceisthetransmitter
Bit3 TXAK:I
2
Cbustransmitacknowledgeag
0:Slavesendacknowledgeag
1:Slavedoesnotsendacknowledgeag
TheTXAKbitisthetransmitacknowledgeag.Aftertheslavedevicereceiptof8-bits
ofdata,thisbitwillbetransmittedtothebusonthe9thclockfromtheslavedevice.
TheslavedevicemustalwayssetTXAKbitto“0”beforefurtherdataisreceived.
Bit2 SRW:I
2
Cslaveread/writeag
0:Slavedeviceshouldbeinreceivemode
1:Slavedeviceshouldbeintransmitmode
TheSRWflagistheI
2
CSlaveRead/Writeflag.Thisflagdetermineswhether
themasterdevicewishestotransmitorreceivedatafromtheI
2
Cbus.Whenthe
transmittedaddressandslaveaddressismatch,thatiswhentheHAASagissethigh,
theslavedevicewillchecktheSRWagtodeterminewhetheritshouldbeintransmit
modeorreceivemode.IftheSRWagishigh,themasterisrequestingtoreaddata
fromthebus,sotheslavedeviceshouldbeintransmitmode.WhentheSRWflag
iszero,themasterwillwritedatatothebus,thereforetheslavedeviceshouldbein
receivemodetoreadthisdata.
Bit1 IAMWU:I
2
CAddressMatchWake-Upcontrol
0:Disable
1:Enable–mustbeclearedbytheapplicationprogramafterwake-up
Thisbitshouldbesetto1toenabletheI
2
CaddressmatchwakeupfromtheSLEEP
orIDLEMode.IftheIAMWUbithasbeensetbeforeenteringeithertheSLEEPor
IDLEmodetoenabletheI
2
Caddressmatchwakeup,thenthisbitmustbeclearedby
theapplicationprogramafterwake-uptoensurecorrectiondeviceoperation.