Holtek HT66F0175 - Standard Type TM Operation Modes

Rev. 1.50 92 August 28, 2017 Rev. 1.50 93 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
TMnRP Register
Bit 7 6 5 4 3 2 1 0
Name TnRP7 TnRP6 TnRP5 TnRP4 TnRP3 TnRP2 TnRP1 TnRP0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit7~0 TnRP7~TnRP0:TMnCCRP8-bitregister,comparedwiththeTMncounterbit15~bit8
ComparatorPmatchperiod:
0:65536TMnclocks
1~255:(1~255)×256TMnclocks
TheseeightbitsareusedtosetupthevalueontheinternalCCRP8-bitregister,which
arethencomparedwiththeinternalcounter’shighesteightbits.Theresultofthis
comparisoncanbeselectedtocleartheinternalcounteriftheTnCCLRbitissetto
zero.SettingtheTnCCLRbittozeroensuresthatacomparematchwiththeCCRP
valueswillresettheinternalcounter.AstheCCRPbitsareonlycomparedwiththe
highesteightcounterbits,thecomparevaluesexistin256clockcyclemultiples.
Clearingalleightbitstozeroisineffectallowingthecountertooverflowatits
maximumvalue.
Standard Type TM Operation Modes
TheStandardTypeTMcanoperateinoneofveoperatingmodes,CompareMatchOutputMode,
PWMOutputMode,SinglePulseOutputMode,CaptureInputModeorTimer/CounterMode.The
operatingmodeisselectedusingtheTnM1andTnM0bitsintheTMnC1register.
Compare Match Output Mode
Toselectthismode,bitsTnM1andTnM0intheTMnC1register,shouldbesetto00respectively.
Inthismodeoncethecounterisenabledandrunningitcanbeclearedbythreemethods.Theseare
acounteroverow,acomparematchfromComparatorAandacomparematchfromComparatorP.
WhentheTnCCLRbitislow,therearetwowaysinwhichthecountercanbecleared.Oneiswhen
acomparematchfromComparatorP,theotheriswhentheCCRPbitsareallzerowhichallows
thecountertooverow.HerebothTnAFandTnPFinterruptrequestagsforComparatorAand
ComparatorPrespectively,willbothbegenerated.
IftheTnCCLRbitintheTMnC1registerishighthenthecounterwillbeclearedwhenacompare
matchoccursfromComparatorA.However,hereonlytheTnAFinterruptrequestflagwillbe
generatedevenifthevalueoftheCCRPbitsislessthanthatoftheCCRAregisters.Thereforewhen
TnCCLRishighnoTnPFinterruptrequestagwillbegenerated.IntheCompareMatchOutput
Mode,theCCRAcannotbesetto“0”.
Asthenameofthemodesuggests,afteracomparisonismade,theTMnoutputpin,willchange
state.TheTMnoutputpinconditionhoweveronlychangesstatewhenaTnAFinterruptrequest
agisgeneratedafteracomparematchoccursfromComparatorA.TheTnPFinterruptrequestag,
generatedfromacomparematchoccursfromComparatorP,willhavenoeffectontheTMnoutput
pin.ThewayinwhichtheTMnoutputpinchangesstatearedeterminedbytheconditionofthe
TnIO1andTnIO0bitsintheTMnC1register.TheTMnoutputpincanbeselectedusingtheTnIO1
andTnIO0bitstogohigh,togolowortotogglefromitspresentconditionwhenacomparematch
occursfromComparatorA.TheinitialconditionoftheTMnoutputpin,whichissetupafterthe
TnONbitchangesfromlowtohigh,issetupusingtheTnOCbit.NotethatiftheTnIO1andTnIO0
bitsarezerothennopinchangewilltakeplace.