Rev. 1.50 134 August 28, 2017 Rev. 1.50 135 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
SPI Communication
AftertheSPIinterfaceisenabledbysettingtheSIMENbithigh,thenintheMasterMode,when
dataiswrittentotheSIMDregister,transmission/receptionwillbeginsimultaneously.Whenthe
datatransferiscomplete,theTRFflagwillbesetautomatically,butmustbeclearedusingthe
applicationprogram.IntheSlaveMode,whentheclocksignalfromthemasterhasbeenreceived,
anydataintheSIMDregisterwillbetransmittedandanydataontheSDIpinwillbeshiftedinto
theSIMDregister.ThemastershouldoutputaSCSsignaltoenabletheslavedevicesbeforea
clocksignalisprovided.Theslavedatatobetransferredshouldbewellpreparedattheappropriate
momentrelativetotheSCSsignaldependinguponthecongurationsoftheCKPOLBbitandCKEG
bit.TheaccompanyingtimingdiagramshowstherelationshipbetweentheslavedataandSCSsignal
forvariouscongurationsoftheCKPOLBandCKEGbits.
TheSPImastermodewillcontinuetofunctionevenintheIDLE1ModeiftheselectedSPIclock
sourceisrunning.
SPI Master Mode Timing
SPI Slave Mode Timing – CKEG = 0