Rev. 1.50 50 August 28, 2017 Rev. 1.50 51 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
Operating Mode Switching
Thesedevicescanswitchbetweenoperatingmodesdynamicallyallowingtheusertoselectthebest
performance/powerratioforthepresenttaskinhand.Inthiswaymicrocontrolleroperationsthat
donotrequirehighperformancecanbeexecutedusingslowerclocksthusrequiringlessoperating
currentandprolongingbatterylifeinportableapplications.
Insimpleterms,ModeSwitchingbetweentheNORMALModeandSLOWModeisexecuted
usingtheHLCLKbitandCKS2~CKS0bitsintheSMODregisterwhileModeSwitchingfromthe
NORMAL/SLOWModestotheSLEEP/IDLEModesisexecutedviatheHALTinstruction.When
aHALTinstructionisexecuted,whetherthedevicesentertheIDLEModeortheSLEEPModeis
determinedbytheconditionoftheIDLENbitintheSMODregisterandtheFSYSONbitinthe
CTRLregister.
WhentheHLCLKbitswitchestoalowlevel,whichimpliesthatclocksourceisswitchedfromthe
highspeedclock,f
H
,totheclocksource,f
H
/2~f
H
/64orf
SUB
.Iftheclockisfromthef
SUB
,thehigh
speedclocksourcewillstoprunningtoconservepower.Whenthishappens,itmustbenotedthat
thef
H
/16andf
H
/64internalclocksourceswillalsostoprunning,whichmayaffecttheoperationof
otherinternalfunctionssuchastheTMs.Theaccompamyingchartshowswhathappenswhenthe
devicesmovebetweenthevariousoperatingmodes.
NORMAL
f
SYS
=f
H
~f
H
/64
f
H
on
CPU run
f
SYS
on
f
SUB
on
f
TBC
on
SLOW
f
SYS
=f
SUB
f
SUB
on
CPU run
f
SYS
on
f
H
off
f
TBC
on
IDLE0
HALT instruction executed
CPU stop
IDLEN=1
FSYSON=0
f
SYS
off
f
SUB
on
f
TBC
on
IDLE1
HALT instruction executed
CPU stop
IDLEN=1
FSYSON=1
f
SYS
on
f
SUB
on
f
TBC
on
SLEEP1
HALT instruction executed
CPU stop
IDLEN=0
f
SYS
off
f
SUB
on
f
TBC
off
WDT on
SLEEP0
HALT instruction executed
CPU stop
IDLEN=0
f
SYS
off
f
SUB
off
f
TBC
off
WDT & LVD off