Holtek HT66F0175 - Page 179

Rev. 1.50 178 August 28, 2017 Rev. 1.50 179 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
MFI2 Register
Bit 7 6 5 4 3 2 1 0
Name — — DEF LVF — — DEE LVE
R/W — — R/W R/W — — R/W R/W
POR — — 0 0 — — 0 0
Bit7~6 Unimplemented,readas“0”
Bit5 DEF:DataEEPROMInterruptrequestag
0:Norequest
1:Interruptrequest
Bit4 LVF:LVDInterruptrequestag
0:Norequest
1:Interruptrequest
Bit3~2 Unimplemented,readas“0”
Bit1 DEE:DataEEPROMInterruptcontrol
0:Disable
1:Enable
Bit0 LVE:LVDInterruptcontrol
0:Disable
1:Enable
Interrupt Operation
Whentheconditionsforaninterrupteventoccur,suchasaTMComparatorPorComparatorAorA/D
conversioncompletion,etc,therelevantinterruptrequestagwillbeset.Whethertherequestag
actuallygeneratesaprogramjumptotherelevantinterruptvectorisdeterminedbytheconditionof
theinterruptenablebit.Iftheenablebitissethighthentheprogramwilljumptoitsrelevantvector;
iftheenablebitiszerothenalthoughtheinterruptrequestagissetanactualinterruptwillnotbe
generatedandtheprogramwillnotjumptotherelevantinterruptvector.Theglobalinterruptenable
bit,ifclearedtozero,willdisableallinterrupts.
Whenaninterruptisgenerated,theProgramCounter,whichstorestheaddressofthenextinstruction
tobeexecuted,willbetransferredontothestack.TheProgramCounterwillthenbeloadedwitha
newaddresswhichwillbethevalueofthecorrespondinginterruptvector.Themicrocontrollerwill
thenfetchitsnextinstructionfromthisinterruptvector.Theinstructionatthisvectorwillusually
beaJMPwhichwilljumptoanothersectionofprogramwhichisknownastheinterruptservice
routine.Hereislocatedthecodetocontroltheappropriateinterrupt.Theinterruptserviceroutine
mustbeterminatedwithaRETI,whichretrievestheoriginalProgramCounteraddressfromthe
stackandallowsthemicrocontrollertocontinuewithnormalexecutionatthepointwherethe
interruptoccurred.
Thevariousinterruptenablebits,togetherwiththeirassociatedrequestflags,areshowninthe
accompanyingdiagramswiththeirorderofpriority.Someinterruptsourceshavetheirown
individualvectorwhileotherssharethesamemulti-functioninterruptvector.Onceaninterrupt
subroutineisserviced,allotherinterruptswillbeblocked,astheglobalinterruptenablebit,EMI
bitwillbeclearedautomatically.Thiswillpreventanyfurtherinterruptnestingfromoccurring.
However,ifotherinterruptrequestsoccurduringthisinterval,althoughtheinterruptwillnotbe
immediatelyserviced,therequestagwillstillberecorded.