Holtek HT66F0175 - Page 52

Rev. 1.50 52 August 28, 2017 Rev. 1.50 53 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
SLOW Mode to NORMAL Mode Switching
InSLOWmodethesystemuseseithertheLXTorLIRClowspeedsystemoscillator.Toswitch
backtotheNARMALMode,wherethehighspeedsystemoscillatorisused,theHLCLKbitshould
besetto“1”orHLCLKbitis“0”,butCKS2~CKS0eldissetto“010”,“011”,“100”,“101”,“110”
or“111”.Asacertainamountoftimewillberequiredforhighspeedsystemoscillatorstabilization
dependsuponwhichhighspeedsystemoscillatortypeisused.
NORMAL Mode
SLOW Mode
CKS2~CKS0 ≠ 000B or 001B
as HLCLK = 0 or HLCLK = 1
SLEEP0 Mode
IDLEN=0
HALT instruction is executed
SLEEP1 Mode
IDLE0 Mode
IDLE1 Mode
WDT and LVD are all off
IDLEN=0
HALT instruction is executed
WDT is on
IDLEN=1, FSYSON=0
HALT instruction is executed
IDLEN=1, FSYSON=1
HALT instruction is executed
Entering the SLEEP0 Mode
ThereisonlyonewayforthedevicestoentertheSLEEP0Modeandthatistoexecutethe“HALT”
instructionintheapplicationprogramwiththeIDLENbitintheSMODregisterequalto“0”andthe
WDTandLVDbothoff.Whenthisinstructionisexecutedundertheconditionsdescribedabove,the
followingwilloccur:
• Thesystemclock,WDTclockandTimeBaseclockwillbestoppedandtheapplicationprogram
willstopatthe"HALT"instruction.
• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.
• TheWDTwillbeclearedandstoppednomatteriftheWDTclocksourceorginatesfromthe
LXTorLIRCoscillator.
• TheI/Oportswillmaintaintheirpresentconditions.
• Inthestatusregister,thePowerDownagPDFwillbeset,andWDTtimeoutagTOwillbe
cleared.