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Rev. 1.50 56 August 28, 2017 Rev. 1.50 57 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
WDTC Register
Bit 7 6 5 4 3 2 1 0
Name WE4 WE3 WE2 WE1 WE0 WS2 WS1 WS0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 1 0 1 0 0 1 1
Bit7~3 WE4~WE0:WDTfunctionenablecontrol
10101:Disabled
01010:Enabled
Othervalues:ResetMCU
Ifthesebitsarechangedduetoadverseenvironmentalconditions,themicrocontroller
willbereset.Theresetoperationwillbeactivatedafter2~3LIRCclockcyclesandthe
WRFbitintheCTRLregisterwillbesetto1.
Bit2~0 WS2~WS0:WDTtime-outperiodselection
000:2
8
/f
SUB
001:2
10
/f
SUB
010:2
12
/f
SUB
011:2
14
/f
SUB
100:2
15
/f
SUB
101:2
16
/f
SUB
110:2
17
/f
SUB
111:2
18
/f
SUB
Thesethreebitsdeterminethedivisionratioofthewatchdogtimersourceclock,
whichinturndeterminesthetime-outperiod.
CTRL Register
Bit 7 6 5 4 3 2 1 0
Name FSYSON LVRF LRF WRF
R/W R/W R/W R/W R/W
POR 0 x 0 0
“x”: unknown
Bit7 FSYSON:f
SYS
ControlinIDLEMode
Describedelsewhere.
Bit6~3 Unimplemented,readas“0”
Bit2 LVRF:LVRfunctionresetag
Describedelsewhere.
Bit1 LRF:LVRcontrolregistersoftwareresetag
Describedelsewhere.
Bit0 WRF:WDTcontrolregistersoftwareresetag
0:Notoccurred
1:Occurred
Thisbitissetto1bytheWDTcontrolregistersoftwareresetandclearedbythe
applicationprogram.Notethatthisbitcanonlybeclearedto0bytheapplication
program.

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