Holtek HT66F0175 - Page 80

Rev. 1.50 80 August 28, 2017 Rev. 1.50 81 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
Bit3 TnOC:TPnOutputcontrol
CompareMatchOutputMode
0:Initiallow
1:Initialhigh
PWMOutputMode
0:Activelow
1:Activehigh
ThisistheoutputcontrolbitfortheTMnoutputpin.Itsoperationdependsupon
whetherTMnisbeingusedintheCompareMatchOutputModeorinthePWMMode.
IthasnoeffectiftheTMnisintheTimer/CounterMode.IntheCompareMatch
OutputModeitdeterminesthelogicleveloftheTMnoutputpinbeforeacompare
matchoccurs.InthePWMModeitdeterminesifthePWMsignalisactivehighor
activelow.
Bit2 TnPOL:TPnOutputpolaritycontrol
0:Non-inverted
1:Inverted
ThisbitcontrolsthepolarityoftheTPnoutputpin.WhenthebitissethightheTMn
outputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasnoeffectifthe
TMnisintheTimer/CounterMode.
Bit1 TnDPX:TMnPWMduty/periodcontrol
0:CCRP–period;CCRA–duty
1:CCRP–duty;CCRA–period
ThisbitdetermineswhichoftheCCRAandCCRPregistersareusedforperiodand
dutycontrolofthePWMwaveform.
Bit0 TnCCLR:TMnCounterClearconditionselection
0:TMnComparatorPmatch
1:TMnComparatorAmatch
Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe
CompactTMcontainstwocomparators,ComparatorAandComparatorP,eitherof
whichcanbeselectedtocleartheinternalcounter.WiththeTnCCLRbitsethigh,
thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA.
Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom
theComparatorPorwithacounteroverow.Acounteroverowclearingmethodcan
onlybeimplementediftheCCRPbitsareallclearedtozero.TheTnCCLRbitisnot
usedinthePWMMode.
TMnRP Register
Bit 7 6 5 4 3 2 1 0
Name TnRP7 TnRP6 TnRP5 TnRP4 TnRP3 TnRP2 TnRP1 TnRP0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit7~0 TnRP7~TnRP0:TMnCCRP8-bitregister,comparedwiththeTMnCounterbit15~bit8
ComprartorPMatchPeriod
0:65535TMnclocks
1~255:256×(1~255)TMnclocks
TheseeightbitsareusedtosetupthevalueontheinternalCCRP8-bitregister,which
arethencomparedwiththeinternalcounter’shighesteightbits.Theresultofthis
comparisoncanbeselectedtocleartheinternalcounteriftheTnCCLRbitissetto
zero.SettingtheTnCCLRbittozeroensuresthatacomparematchwiththeCCRP
valueswillresettheinternalcounter.AstheCCRPbitsareonlycomparedwiththe
highesteightcounterbits,thecomparevaluesexistin256clockcyclemultiples.
Clearingallthreebitstozeroisineffectallowingthecountertooverflowatits
maximumvalue.