Rev. 1.50 84 August 28, 2017 Rev. 1.50 85 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
Timer/Counter Mode
Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto11respectively.
TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode
generatingthesameinterruptags.TheexceptionisthatintheTimer/CounterModetheTMnoutput
pinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompareMatch
OutputModecanbeusedtounderstanditsfunction.AstheTMnoutputpinisnotusedinthismode,
thepincanbeusedasanormalI/Opinorotherpin-sharedfunction.
PWM Output Mode
Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto10respectively.
ThePWMfunctionwithintheTMnisusefulforapplicationswhichrequirefunctionssuchasmotor
control,heatingcontrol,illuminationcontroletc.Byprovidingasignalofxedfrequencybutof
varyingdutycycleontheTMnoutputpin,asquarewaveACwaveformcanbegeneratedwith
varyingequivalentDCRMSvalues.
AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated
waveformisextremelyflexible.InthePWMmode,theTnCCLRbithasnoeffectonthePWM
operation.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform,one
registerisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,while
theotheroneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequency
ordutycycleisdeterminedusingtheTnDPXbitintheTMnC1register.ThePWMwaveform
frequencyanddutycyclecanthereforebecontrolledbythevaluesintheCCRAandCCRPregisters.
Aninterruptag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch
occursfromeitherComparatorAorComparatorP.TheTnOCbitintheTMnC1registerisusedto
selecttherequiredpolarityofthePWMwaveformwhilethetwoTnIO1andTnIO0bitsareusedto
enablethePWMoutputortoforcetheTMoutputpintoaxedhighorlowlevel.TheTnPOLbitis
usedtoreversethepolarityofthePWMoutputwaveform.
• 16-bit CTM, PWM Mode, Edge-aligned Mode, TnDPX=0
CCRP 1~255 0
Period CCRP
×
256 65536
Duty CCRA
Iff
SYS
=16MHz,TMnclocksourceisf
SYS
/4,CCRP=2andCCRA=128,
TheTMnPWMoutputfrequency=(f
SYS
/4)/(2×256)=f
SYS
/2048=7.8125kHz,duty=128/(2×256)=
25%.
IftheDutyvaluedenedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe
PWMoutputdutyis100%.
• 16-bit CTM, PWM Mode, Edge-aligned Mode, TnDPX=1
CCRP 1~255 0
Period CCRA
Duty CCRP
×
256 65536
ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeTMnclock
whilethePWMdutycycleisdenedbythe(CCRP×256)valueexceptwhentheCCRPvalueis
equalto0.