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Rev. 1.50 90 August 28, 2017 Rev. 1.50 91 August 28, 2017
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
HT66F0175/HT66F0185
A/D Flash MCU with EEPROM
TMnC1 Register
Bit 7 6 5 4 3 2 1 0
Name TnM1 TnM0 TnIO1 TnIO0 TnOC TnPOL TnDPX TnCCLR
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit7~6 TnM1~TnM0:SelectTMnOperatingMode
00:CompareMatchOutputMode
01:CaptureInputMode
10:PWMModeorSinglePulseOutputMode
11:Timer/CounterMode
ThesebitssetuptherequiredoperatingmodefortheTMn.Toensurereliableoperation
theTMnshouldbeswitchedoffbeforeanychangesaremadetotheTnM1andTnM0
bits.IntheTimer/CounterMode,theTMnoutputpincontrolwillbedisabled.
Bit5~4 TnIO1~TnIO0:SelectTPnpinoutputfunction
CompareMatchOutputMode
00:Nochange
01:Outputlow
10:Outputhigh
11:Toggleoutput
PWMOutputMode/SinglePulseOutputMode
00:PWMoutputinactivestate
01:PWMoutputactivestate
10:PWMoutput
11:SinglePulseOutput
CaptureInputMode
00:InputcaptureatrisingedgeofTPn
01:InputcaptureatfallingedgeofTPn
10:Inputcaptureatrising/fallingedgeofTPn
11:Inputcapturedisabled
Timer/CounterMode
Unused
ThesetwobitsareusedtodeterminehowtheTMnoutputpinchangesstatewhena
certainconditionisreached.Thefunctionthatthesebitsselectdependsuponinwhich
modetheTMnisrunning.
IntheCompareMatchOutputMode,theTnIO1andTnIO0bitsdeterminehowthe
TMnoutputpinchangesstatewhenacomparematchoccursfromtheComparator
A.TheTMoutputpincanbesetuptoswitchhigh,switchlowortotoggleitspresent
statewhenacomparematchoccursfromtheComparatorA.Whenthebitsareboth
zero,thennochangewilltakeplaceontheoutput.TheinitialvalueoftheTMnoutput
pinshouldbesetupusingtheTnOCbitintheTMnC1register.Notethattheoutput
levelrequestedbytheTnIO1andTnIO0bitsmustbedifferentfromtheinitialvalue
setupusingtheTnOCbitotherwisenochangewilloccurontheTMnoutputpinwhen
acomparematchoccurs.AftertheTMnoutputpinchangesstate,itcanberesettoits
initiallevelbychangingtheleveloftheTnONbitfromlowtohigh.
InthePWMMode,theTnIO1andTnIO0bitsdeterminehowtheTMnoutputpin
changesstatewhenacertaincomparematchconditionoccurs.ThePWMoutput
functionismodifiedbychangingthesetwobits.Itisnecessarytoonlychangethe
valuesoftheTnIO1andTnIO0bitsonlyaftertheTMnhasbeenswitchedoff.
UnpredictablePWMoutputswilloccuriftheTnIO1andTnIO0bitsarechangedwhen
theTMnisrunning.

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