542 Chapter10
Synthesizer Section
Unlocked YTO PLL
CAUTION Replacement of the phase/frequency detector chip A14U204 is not
recommended. The part is very delicate and requires special tooling to
install successfully.
7. If the YTO frequency error recorded in step 5 is greater than 20
MHz, do the following:
• Check the YTO Adjustments using the TAM or the procedure in
Chapter 2.
• Check the YTO DACs using the procedure in steps 41 through 49
below, or using manual probe troubleshooting with the TAM on
A14J17 and A14J18.
• Refer to steps 9 through 33 below.
8. If the YTO Frequency error recorded in step 5 is less than 20 MHz,
do the following:
• Measure the frequency at A14J304. The frequency should be
equal to the frequency recorded in step 6. If not, refer to
"Unlocked Fractional N PLL" in this chapter.
• Measure the input and output levels of the A15U100 sampler. If
the sampler appears defective, check the LO drive to the sampler
as described in "Sampler and Sampler IF."
• Refer to steps 34 through 51 below.
Check first LO pretune frequency and amplitude (steps 10-13)
9. The pretuned frequency of the first LO must be sufficiently accurate
for the YTO loop to acquire lock. The amplitude of the first LO must
be sufficient to drive the A15U100 sampler. Perform the YTO
Adjustment procedure, particularly the YTO main coil adjustments.
(If available, use a synthesized microwave spectrum analyzer
instead of the microwave frequency counter specified in the
adjustment procedure.)
10.If the YTO main coil cannot be adjusted, proceed to step 33 to
troubleshoot the main coil coarse and fine DACs and main coil tune
DAC.
11.The 1ST LO OUTPUT on the front panel should measure between
+14.5 and +18.5 dBm in amplitude.
12.If the 1ST LO OUTPUT amplitude is out of the specified range,
perform the first LO distribution amplifier adjustment procedure.
Refer to Chapter 2.
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