2-4 Chapter2
HP ESA Status Registers
Using the Analyzer Status Registers
• Monitor a change in the condition of a particular bit, or bits.
Once you have enabled a bit, the analyzer will monitor it for a
change in its condition. The transition registers are preset to
register the conditions going from 0 to 1, positive transitions. This
can be changed so that the selected bit is detected if it goes from true
to false (negative transition), or if either transition occurs. Querying
the event register allows you to detect that a change in this condition
occurred. The event register can only be cleared by querying it or
sending the *CLS command, which clears all event registers.
Setting and Querying the Registers
Each bit in a register is represented by a numerical value based on its
location. See Figure 2-1 below. This number is sent with the command,
to enable a particular bit. If you want to enable more than one bit, you
would send the sum of all the bits that you are interested in.
For example, to enable bit 0 and bit 6 of standard event status register,
you would send the command *ESE 65 (1 + 64 = 65).
The results of a query are evaluated in a similar way. If the *STB?
command returns a decimal value of 140, (140 = 128 + 8 + 4) then the
bit 7 is true, bit 3 is true and bit 2 is true.
Figure 2-1 Status Register Bit Values
Using the Service Request (SRQ) Method
Your language, bus and programming environment must be able to
support SRQ interrupts. (For example, BASIC used with the GPIB.)
When you monitor a condition with the SRQ method, you must:
1. Determine which bit monitors the condition.
2. Determine how that bit reports to the request service (RQS) bit of
the status byte.
Bit Number
7
89101112131415
6
5
432
1
0
2048
512
32
16
4
8
1
16384
8192
4096
1024
128
256
64
Decimal Value
32768
2
ck730a
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