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Functional Description
From
a programming point
of
view, this attachment consists
of
an 8-bit
digital output register in parallel with a
NEC
,uPD765
or
equivalent
Floppy Disk Controller
(FDC).
In
the following description, drives numbers 0-3 are equivalent to drives
A-D respectively.
Digital Output Register
(DOR)
The Digital Output Register
(DOR)
is an output only register used to
control drive motors, drive selection, and feature enable. All bits are
cleared by the
I/O
interface reset line. The bits have the following
functions:
Bits 0 and 1 These bits are decoded by the hardware to select
one drive
if
its motor is on:
Bit 1 0 Drive
o 0 0 A
o
liB
1 0 2 C
1 1 3 D
Bit 2
The
FDC
is held reset when this bit is clear.
It
must be set by the program to enable the
FDC.
Bit 3 This bit allows the
FDC
interrupt and
DMA
requests to be gated onto the
I/O
interface.
If
this
bit
is
cleared, the interrupt and
DMA
request
I/O
interface drivers are disabled.
Bits 4,5,6, and 7 These bits control respectively the motors
of
drives 0,1,2,A,B,C, and 3,D.
If
a bit
is
clear,
the associated motor is off, and the drive
cannot be selected.
Floppy Disk Controller
(FDC)
The following is a brief summary
of
the registers and commands imple-
mented by the
FDC.
The
FDC
contains two registers which may be accessed by the main
system processor; a Status Register and a
Data
Register.
The
8-bit
Main Status Register contains the status information
of
the
FDC,
and
may be accessed
at
any time. The 8-bit
Data
Register (actually
consisting
of
several registers in a stack with only one register presented
to the data bus
at
a time) stores data, commands, parameters, and
FD
D
status information.
Data
bytes are read
out
of,
or
written into, the
Data
2-91
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