DMA
Channels
The display buffer will support a
DMA
operation, however
CPU
wait-states will be inserted during
DMA.
Interrupt Levels
Interrupt Level 7
is
used on the parallel interface. Interrupts can be
enabled
or
disabled via the Printer Control Port.
The
interrupt
is
a high
level active signal.
I/O
Address and Bit Map
The table below breaks down the functions
of
the
I/O
Address decode
for the card. The
I/O
address decode is from '3BO' through
'3BF'.
The bit assignment for each
I/O
address follows:
I/O
Address Function
3BO
Not
Used
3Bl
Not
Used
3B2
Not
Used
3B3
Not
Used
3B4 6845 Index Register
3B5 6845
Data
Register
-.
3B6
Not
Used r ,
3B7
Not
Used
3B8
CRT
Control Port 1
3B9 Reserved
3BA
CRT
Status Port
3BB Reserved
3BC Parallel
Data
Port
3BD Printer Status
Port
3BE Printer Control Port
3BF
Not
Used
The 6845 Index and
Data
Registers are used to program the
CRT
controller to interface to the high resolution Monochrome Display.
•
CRT
Output
Port
1
(I/O
Address '3B8')
Bit
:#=
Function
o +high resolution mode
1
Not
used
2
Not
used
3
+ video enable
4
Not
used
5
+ enable blink
6,7
Not
used
2-42
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