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IBM 5150 Hardware Reference Manual

IBM 5150
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Page #154 background image
Bit
3:
This bit
is
the Parity Enable bit. When bit 3
is
a logic
1,
a Parity
bit is generated (transmit data) or checked (receive data) between the
last data word bit and Stop bit
of
the serial data. (The Parity bit is used
to produce an even or odd number
of
1
's
when the
data
word bits and the
Parity bit are summed.)
~
Bit
4:
This bIt
is
the Even Parity Select bit. When bit 3 is a logic 1 and
bit 4
is
a logic 0, an odd number oflogic 1 's
is
transmitted or checked in
the data word bits and Parity bit. When bit 3 is a logic 1 and bit 4
is
a
logic 1, an even number
of
bits
is
transmitted
or
checked.
Bit
5:
This bit is the Stick Parity bit. When bit 3
is
a logic 1 and bit 5
is
a
logic 1, the Parity bit
is
transmitted and then detected by the receiver as
a logic 0 if bit 4 is a logic 1 or as a logic 1
if
bit 4
is
a logic
O.
Bit
6:
This bit
is
the Set Break Control bit. When bit 6 is a logic 1, the
serial output
(SOUT)
is
forced to the Spacing (logic 0) state and
remains there regardless of other transmitter activity. The set break
is
disabled by setting bit 6 to a logic
O.
This feature enables the
CPU
to
alert a terminal in a computer communications system.
Bit 7:This bit
is
the Divisor Latch Access Bit (DLAB).
It
must be set
high (logic 1) to access the Divisor Latches
of
the Baud Rate Generator
during a Read or Write operation.
It
must be set low (logic
0)
to access
~
the Receiver Buffer, the Transmitter Holding Register,
or
the Interrupt
Enable Register.
INS8250 Programmable Baud Rate Generator
The
INS8250
contains a programmable Baud Rate Generator that
is
capable
of
taking the clock input (1.8432 MHz) and dividing it by any
divisor from 1 to
(21
6 -1). The output frequency
of
the Baud Generator
is
16x the Baud rate [divisor
#=
(frequency input) / (baud rate x 16)].
Two 8-bit latches store the divisor in a 16-bit binary format. These
Divisor Latches must be loaded during initialization in order to ensure
desired operation
of
the Baud Rate Generator. Upon loading either
of
the Divisor Latches, a 16-bit Baud counter
is
immediately loaded. This
prevents long counts on initial load.
2-135

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IBM 5150 Specifications

General IconGeneral
ProcessorIntel 8088
Clock Speed4.77 MHz
RAM16 KB - 256 KB
ManufacturerIBM
Model5150
Release Year1981
Storage5.25-inch floppy drives
GraphicsMDA or CGA
Operating SystemIBM PC DOS
PortsCassette, keyboard
Expansion Slots5

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