IBM 5150 - Page 279

MEMORY SEGMENTATION MODEL
o
..[
ot FFFFFH
LOGICAL
P
MEMO RY SPACE
t~
64KB
CODE SEGMENT r"'\
}
~
XXXXOH
i=:
} STACK SEGMENT
01 SP LAII'M ,NT
15
0
OFFSET
I DISPLACEMENT
ADORES
S
I-
:~
----!
I
I
I
I
MSB
I
15
0
I
WORD {
I
SELECTED
I
LSB
} DATA SEGMENT
CS
0000
r-
SEGMENT
BYTE
REGISTER
SS 0000
~
OS
0000
CS,SS, OS, ES
ES 0000
.--
I
::
~
OR NONE
FOR I/O, INT
~,
I
I
I
EXTRA DATA
~
7
:;-
V
I
}
SEGMENT
I
I
ADDER
I
I
I
L
T
OOOOOH
I
19
0
>-
PHYSICAL
ADDRESS
LATCH
SEGMENT OVERRIDE PREFIX
IOOlregl101
USE OF SEGMENT OVERRIDE
OPERAND REGISTER
DEFAULT WITH OVERRIDE PREFIX
IP (code address)
CS
Never
SP (stack address)
SS
Never
BP (stack address or stack marker)
SS
BP + DS or ES, or CS
SI or D 1 (not incl. strings)
OS
ES, SS, or CS
SI (implicit source addr for strings) OS
ES, SS, or CS
01 (implicit dest addr for strings) ES Never
B-4