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IBM 7090 User Manual

IBM 7090
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positions
of
the
dividend
are
reduced
by
the
amount
of
the
divisor
and
the
difference
is
put
into
the
AC.
If
a
reduction
is
not
possible
the
AC
remains
the
same.
A
successful
reduction
causes
a
one
to
be
put
into
MQ(35).
After
the
reduction
time,
the
AC
and
MQ
are
shifted
left
to
bring
the
next
position
of
the
dividend
into
the
AC
and
another
reduc-
tion
is
tried.
This
operation
continues
until
all
positions
of
the
MQ
portion
of
the
divi-
dend
have
been
moved
to
the
AC.
Figure
5.3-20
shows
the
sequence
of
a DVH
operation.
Because
subtraction
in
the
7090
is
accomplished
through
complement
addition,
the
AC
contents
are
put
into
comple-
ment
form
early
in
the
E
cycle.
This
complement
and
the
contents
of
the
SR
are
added
to
determine
if
the
quotient
will
be
small
enough
for
the
MQ
register.
A Q
carry
indi-
cates
that
division
is
possible
and
a
no
Q
carry
indicates
that
division
is
not
possible.
Also,
during
the
E
cycle,
438
is
put
into
the
SC
and
this
will
be
used
to
indicate
when
all
dividend
positions
have
been
used.
When
there
is
no
Q
carry
as
a
result
of
the
E
cycle
test,
the
divide
check
trigger
is
turned
on
and
the
computer
is
Signalled
to
divide
check
end
operation.
An L
cycle
occurs
before
actual
end
operation
because
the
divide
check
end
operation
signal
comes
too
late
in
the
E
cycle.
During
the
I
cycle
of
the
next
instruction,
the
master
stop
trig-
ger
is
turned
on
and
this
causes
B
cycle
interrupt
to
be
activated.
B
cycle
interrupt
prevents
I,
E,
and
L
cycles.
A Q
carry
as
the
result
of
the
E
cycle
test
allows
normal
divide
operation
to
take
place.
Toward
the
end
of
the
E
cycle
the
AC
and
MQ
are
shifted
left,
the
SC
is
stepped
and
the
MQ
sign
is
set.
This
brings
the
next
position
of
the
dividend
into
the
AC.
Note
that
while
shifting
from
MQ(l)
to
AC
(35),
the
information
is
complemented
because
a
complement
number
is
used
in
the
AC.
The
computer
then
goes
into
L
cycleso
A
reduction
is
attempted
and
a 1
is
put
into
MQ(35)
if
the
reduction
is
successful.
Again
there
is
a
left
shift
of
the
AC
and
MQ
and
the
SC
is
stepped.
This
attempted
reduction
and
shifting
procedure
continues
until
the
SC
equals
zero.
When
the
SC=O,
divide
end
operation
is
actuated.
During
the
I
cycle
of
the
next
instruction
the
AC
is
again
complemented
to
make
the
remainder
a
true
number.
Divide
or
Proceed
DVP
+0221 (Min
I,
E,
L)
Figure
5.3-20
(Max
I,
E,
12L)
The
execution
of
this
instruction
is
identical
to
DVH
except
that
the
computer
is
not
stopped
for
the
divide
check
violation,
but
proceeds
to
the
next
instruction.
The
divide
check
trigger
is
not
allowed
to
turn
on
the
master
stop
trigger
during
the
I
cycle
of
the
next
instruction.
Variable-Length
Divide
or
Halt
VDH +0224 (Min
I,
E)
Figure
5.3-20
(Max
I,
E,
12L)
This
instruction
operates
the
same
as
DVH,
except
that
the
number
of
reductions
to
be
taken
is
specified
by
the
count
in
positions
(12-17)
of
the
instruction.
The
number
of
positions
in
the
quotient
is
equal
to
the
count
and
will
be
contained
in
the
low-order
positions
of
the
MQ.
The
count
should
be
restricted
to
a
number
between
0
and
438'
A
zero
count
ends
operation
in
E
time
and
prevents
the
shift
at
the
end
of
the
E
cycle.
A
67

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IBM 7090 Specifications

General IconGeneral
CategoryMainframe Computer
Introduced1959
Transistor-basedYes
Word Length36 bits
Add Time4.8 microseconds
MemoryCore memory
Memory (words)32, 768 words