9.1.7 Ultra DMA timings
The Ultra DMA timing meets Modes 0, 1, 2, 3, 4, and 5 of the Ultra DMA Protocol.
9.1.7.1 Initiating Read DMA
DSTROBE
HDMARDY-
DMACK-
DMARQ
STOP
tUI
tACK
tENV
tACK tENV
tZIORDY
tFS
tCYC tCYC
t2CYC
DD00–DD15
tZADtAZ
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Host drives DD
Device drives DD
tDVH
tDVS
RD Data
RD Data RD Data
tZAD
tDZSF
(all values are in ns)
–25–7–20–31–48–70
Time from data output until
the first transition
tDZFS
–5–6–6–6–6–6Data hold time (at device side)tDVH
–5–7–20–31–48–70Data setup time (at device side)tDVS
–0–0–0–0–0–0Output enable timetZAD
10–10–10–10–10–10–Output release timetAZ
–38–57–86–115–153–2302 cycle timet2CYC
–17–25–39–54–73–112Cycle timetCYC
90012001300170020002300First strobe timetFS
–0–0–0–0–0–0
Wait time before driving
DSTROBE
tZIORDY
502055205520702070207020Envelope timetENV
–20–
20
–20–20–20–20
Setup time before -DMACK tACK
–0–0–0–0–0–0Unlimited interlock timetUI
MAXMIN MAXMIN MAXMIN MAXMIN MAXMIN MAXMIN Parameter descriptions
MODE5MODE4MODE3MODE2MODE1MODE0
Signal
names
Figure 27. Ultra DMA cycle timings—Initiating Read
Deskstar 60 GXP Hard disk drive specification
32