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Intel Agilex

Intel Agilex
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Contents
1. Intel
®
Agilex
Variable Precision DSP Blocks Overview.................................................. 4
1.1. Features...............................................................................................................4
1.2. Supported Operational Modes in Intel Agilex Devices.................................................. 5
1.2.1. Fixed-Point Arithmetic................................................................................ 5
1.2.2. Floating-Point Arithmetic.............................................................................7
2. Intel Agilex Variable Precision DSP Blocks Architecture .................................................9
2.1. Fixed-Point Arithmetic.......................................................................................... 12
2.1.1. Input Register Bank for Fixed-Point Arithmetic............................................. 12
2.1.2. Pipeline Registers for Fixed-Point Arithmetic................................................ 16
2.1.3. Pre-adder for Fixed-Point Arithmetic........................................................... 17
2.1.4. Internal Coefficient for Fixed-Point Arithmetic.............................................. 17
2.1.5. Multipliers for Fixed-Point Arithmetic...........................................................17
2.1.6. Adder or Subtractor for Fixed-Point Arithmetic............................................. 17
2.1.7. Accumulator, Chainout Adder, and Preload Constant for Fixed-Point Arithmetic. 18
2.1.8. Systolic Register for Fixed-Point Arithmetic..................................................19
2.1.9. Double Accumulation Register for Fixed-Point Arithmetic............................... 19
2.1.10. Output Register Bank for Fixed-Point Arithmetic......................................... 20
2.2. Floating-Point Arithmetic.......................................................................................20
2.2.1. Input Register Bank for Floating-Point Arithmetic......................................... 20
2.2.2. Pipeline Registers for Floating-Point Arithmetic.............................................22
2.2.3. Multipliers for Floating-Point Arithmetic....................................................... 23
2.2.4. Adder or Subtractor for Floating-Point Arithmetic..........................................24
2.2.5. Output Register Bank for Floating-Point Arithmetic....................................... 24
2.2.6. Exception Handling for Floating-Point Arithmetic...........................................25
3. Intel Agilex Variable Precision DSP Blocks Operational Modes......................................32
3.1. Operational Modes for Fixed-Point Arithmetic........................................................... 32
3.1.1. Independent Multiplier Mode......................................................................32
3.1.2. 8 x 8 (unsigned) or 9 x 9 (signed) Sum of 4 Mode........................................34
3.1.3. Multiplier Adder Sum Mode........................................................................34
3.1.4. Independent Complex Multiplier.................................................................35
3.1.5. Systolic FIR Mode.................................................................................... 37
3.2. Operational Modes for Floating-Point Arithmetic....................................................... 40
3.2.1. FP32 Single-Precision Floating-Point Arithmetic Functions.............................. 40
3.2.2. FP16 Half-Precision Floating-Point Arithmetic Functions................................. 44
3.2.3. Multiple Floating-Point Variable DSP Blocks Functions....................................55
4. Intel Agilex Variable Precision DSP Blocks Design Considerations................................ 62
4.1. Fixed-Point Arithmetic.......................................................................................... 62
4.1.1. Configurations for Input, Pipeline, and Output Registers................................ 62
4.1.2. Internal Coefficient and Pre-Adder for Fixed-Point Arithmetic......................... 64
4.1.3. Accumulator for Fixed-Point Arithmetic....................................................... 64
4.1.4. Input Cascade for Fixed-Point Arithmetic.....................................................64
4.1.5. Chainout Adder........................................................................................67
4.2. Floating-Point Arithmetic.......................................................................................67
4.2.1. Configurations for Input, Pipeline, and Output Registers ............................... 67
4.2.2. Chainout Adder........................................................................................72
Contents
Intel
®
Agilex
Variable Precision DSP Blocks User Guide
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