1. Intel
®
Agilex
™
Variable Precision DSP Blocks Overview
The variable precision digital signal processing (DSP) blocks in Intel
®
Agilex
™
devices
can support fixed-point arithmetic, single-precision, and half-precision floating-point
arithmetic operations. The Intel Agilex DSP blocks provide high design flexibility and
are optimized to support high-performance DSP applications.
1.1. Features
The Intel Agilex fixed-point arithmetic features include:
• High-performance, power-optimized, and fully registered multiplication operations
• 9-bit, 18-bit, and 27-bit word lengths
• Two 18 x 19 multipliers or one 27 x 27 multiplier per DSP block
• Built-in addition, subtraction, and 64-bit double accumulation register to combine
multiplication results
• Cascading 19-bit or 27-bit and cascading 18-bit when pre-adder is used to form
the tap-delay line for filtering applications
• Cascading 64-bit output bus to propagate output results from one block to the
next block without external logic support
• Hard pre-adder supported in 18-bit and 27-bit DSP operation modes for symmetric
filters
• Internal coefficient register bank in both 18-bit and 27-bit modes for filter
implementation
• 18-bit and 27-bit systolic finite impulse response (FIR) filters with distributed
output adder
• Biased rounding support
• Dynamically enable and disable scanin and chainout features
The Intel Agilex floating-point arithmetic is a completely hardened architecture.
Features for floating-point arithmetic include :
• Single-precision (32-bit arithmetic) and half-precision (16-bit arithmetic) modes
• Operational mode for flushed, extended, and bfloat16 floating-point format
• Multiplication, addition, subtraction, multiply-add, and multiply-subtract
• Multiplication with accumulation capability and a dynamic accumulator reset
control
• Multiplication with cascade summation and subtraction capability
• Complex multiplication
• Direct vector dot product
• Systolic vector dot product
UG-20213 | 2019.04.02
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