Intel Agilex User Guide

Table 25. DISABLE_SCANIN Signal Behavior
DISABLE_CHAINOUT Signal Description
Low (0)
Source of multiplier input is from SCANIN input.
High (1)
Source of multiplier input is switched from SCANIN to AY.
When DISABLE_SCANIN port is used, the input register for this signal will be enabled.
The register is driven by free running clock and there is no clock enable or clock clear
signal to control this register.
4.1.5. Chainout Adder
You can use the output chaining path to add results from another DSP block. The
output chainout port can be dynamically disable by asserting the DISABLE_CHAINOUT
signal.
The chainout adder support all operational modes except for 18 x 18 or 18 x 19
independent multiplier mode.
When DISABLE_CHAINOUT port is used, the input register for this signal will be
enabled. The register is driven by free running clock and there is no clock enable or
clock clear signal to control this register.
4.2. Floating-Point Arithmetic
4.2.1. Configurations for Input, Pipeline, and Output Registers
The configurations for the input, pipeline, and output registers are restricted due to
the timing model in Intel Agilex devices. Therefore these registers only support certain
configurations.
You must enable all registers within the same register level but you can use different
clock enables. However, when port accumulate is connected to constant VCC, the
register settings for accumulate_clken, accum_pipeline_clken,
accum_2nd_pipeline_clken, and accum_adder_clken should be disabled to
avoid register clear signal interrupting the constant VCC.
The following registers should have the same clock enable settings:
•
Registers adder_input_clken and accum_adder_clken when operation_mode
is set to FP32 multiplication with accumulation mode, sum of two FP16
multiplication with accumulation mode, or FP16 vector three mode.
•
Registers fp16_mult_input_clken and fp32_adder_a_clken when in all
FP16 operation modes except FP16 vector three mode.
4. Intel Agilex Variable Precision DSP Blocks Design Considerations
UG-20213 | 2019.04.02
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Variable Precision DSP Blocks User Guide
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Intel Agilex Specifications

General

Brand	Intel
Model	Agilex
Category	Microcontrollers
Language	English