Intel Agilex

Figure 48. Input Cascade in Fixed-Point Arithmetic 27 x 27 Mode
ay[26..0]
az[25..0]
ax[26..0]
scanin[26..0]
CLK
ENA[2..0]
CLR[0]
scanout[26..0]
4.1.4.1. Dynamic Scanin
When input cascade is used, the source of top multiplier can be dynamically switched
between SCANIN and AY by asserting/de-asserting DISABLE_SCANIN input.
Figure 49. Dynamic Scanin
*
Multiplier
0
1
DISABLE_SCANIN
AY[18..0]
SCANIN[18..0]
Input
register
Input
register
4. Intel Agilex Variable Precision DSP Blocks Design Considerations
UG-20213 | 2019.04.02
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Variable Precision DSP Blocks User Guide
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