Intel Cyclone V User Manual

Figure 3. Setting the Enable DM Pins Option in HPS Component
Determine your SDRAM Memory type and bit width. Cyclone V and Arria V SoC devices
offer DDR3, DDR2 and LPDDR2 SDRAM support for the HPS.
GUIDELINE: Ensure that you choose only DDR3, DDR2, or LPDDR2
components or modules in configurations supported by the Cyclone V or Arria
V HPS EMIF for your specific device/package combination.
The External Memory Interface Spec Estimator, available on the External Memory
Interface page, is a parametric tool that allows you to compare supported external
memory interface types, configurations and maximum performance characteristics in
Intel FPGA and SoC devices.
First, filter the “Family” to select only Cyclone V /Arria V SoC device. Then, follow on
by using the filter on “Interface Type” to choose only “HPS Hard Controller”
GUIDELINE: Ensure that in the HPS Component, the Memory Clock Frequency
is supported by the device speed grade.
To obtain the maximum supported memory clock frequency for the device speed
grade, refer to the External Memory Interface Spec Estimator, available on the
External Memory Interface page.
3. Design Guidelines for HPS portion of SoC FPGAs
AN-796 | 2018.06.18
AN 796: Cyclone V and Arria V SoC Device Design Guidelines
22

Intel Cyclone V Specifications

General

FPGA Family	Cyclone V
Logic Elements	25K to 301K
Transceivers	Up to 12
Processor	Dual-core ARM Cortex-A9
Process Technology	28 nm
Embedded Memory	M10K blocks
Operating Temperature	0°C to +85°C (Commercial), -40°C to +100°C (Industrial), -40°C to +125°C (Automotive)
Power Consumption	Varies by configuration and usage
Maximum User I/O	Up to 524