Intel Cyclone V User Manual

1.3. Overview of Board Design Guidelines for SoC FPGA Design
Table 3. Board Design: Design Guidelines Overview
Stages of the Board Design Flow Guidelines Links
HPS Power design considerations Power on board bring up, early power
estimation, design considerations for
HPS and FPGA power supplies, power
analysis and power optimization
HPS Power Design Considerations on
page 32
Board design guidelines for HPS
interfaces
Includes EMAC, USB, QSPI, SD/MMC,
NAND, UART and I
2
C
Design Guidelines for HPS Interfaces
on page 36
1. Overview of the Design Guidelines for Cyclone
®
V SoC FPGAs and Arria
®
V SoC FPGAs
AN-796 | 2018.06.18
AN 796: Cyclone V and Arria V SoC Device Design Guidelines
8

Intel Cyclone V Specifications

General

FPGA Family	Cyclone V
Logic Elements	25K to 301K
Transceivers	Up to 12
Processor	Dual-core ARM Cortex-A9
Process Technology	28 nm
Embedded Memory	M10K blocks
Operating Temperature	0°C to +85°C (Commercial), -40°C to +100°C (Industrial), -40°C to +125°C (Automotive)
Power Consumption	Varies by configuration and usage
Maximum User I/O	Up to 524